• 2525 Citations
  • 23 h-Index
1983 …2020

Research output per year

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1983

(SM)**2: SPARSE MATRIX SOLVING MACHINE.

Amano, H., Yoshida, T. & Aiso, H., 1983 Jan 1, Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, p. 213-220 8 p. (Conference Proceedings - Annual Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)
1984

HOBONET: AN INTER-PU CONNECTION NETWORK WITH FAULT-TOLERANCY.

Osawa, G., Yokota, T., Amano, H. & Aiso, H., 1984 Dec 1, Proceedings of the International Conference on Parallel Processing. Keller, R. M. (ed.). IEEE, p. 165-168 4 p. (Proceedings of the International Conference on Parallel Processing).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1985

(SM)**2 -II: A NEW VERSION OF THE SPARSE MATRIX SOLVING MACHINE.

Amano, H., Boku, T., Kudoh, T. & Aiso, H., 1985 Dec 1, Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, p. 100-107 8 p. (Conference Proceedings - Annual Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

NDL: A LANGUAGE FOR SOLVING SCIENTIFIC PROBLEMS ON MIMD MACHINES.

Kudoh, T., Amano, H., Boku, T. & Aiso, H., 1985 Dec 1, Unknown Host Publication Title. IEEE, p. 55-64 10 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)
1986

An adaptable cluster structure of (SM)2 -II

Saito, C., Amano, H., Kudoh, T. & Aiso, H., 1986 Jan 1, CONPAR 1986 - Conference on Algorithms and Hardware for Parallel Processing, Proceedings. Handler, W., Jeltsch, R., Lange, O., Haupt, D. & Juling, W. (eds.). Springer Verlag, p. 53-60 8 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 237 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
1987

RSM (RECEIVER SELECTABLE MULTICAST): A COMMUNICATION MECHANISM FOR MULTIPROCESSORS.

Amano, H., 1987 Jan 1, Unknown Host Publication Title. IEEE, p. 149-156 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
1988

IMPULSE: A HIGH PERFORMANCE PROCESSING UNIT FOR MULTIPROCESSORS FOR SCIENTIFIC CALCULATION.

Boku, T., Nomura, S. & Amano, H., 1988 Jan 1, Unknown Host Publication Title. IEEE, p. 365-372 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
1989

A new version of a parallel production system machine, MANJI-II

Miyazaki, J., Takeda, K., Amano, H. & Aiso, H., 1989, Database Machines - 6th International Workshop, IWDM 1989, Proceedings. Springer Verlag, Vol. 368 LNCS. p. 317-330 14 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 368 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A static scheduling system for a parallel machine (SM)2-II

Xiao-Ping, L. & Amano, H., 1989, PARLE 1989: Parallel Architectures and Languages Europe - Parallel Languages, Proceedings. Springer Verlag, Vol. 365 LNCS. p. 118-135 18 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 365 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)
1991

A 0.8-μm BiCMOS sea-of-gates implementation of the tandem banyan fast packet switch

Chiussi, F. M., Amano, H. & Tobagi, F. A., 1991 Dec 1, Proceedings of the Custom Integrated Circuits Conference. Publ by IEEE, (Proceedings of the Custom Integrated Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
1993

Performance analysis for the arbitor of IEEE standard backplane bus Futurebus/Futurebus+

Yamamoto, O., Takemoto, T., Kimura, T. & Amano, H., 1993 Jan 1, Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process. Publ by IEEE, p. 386-389 4 p. (Proc IEEE 1993 Pac Rim Conf Commun Comput Signal Process).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Performance evaluation of WASMII: A data driven computer on a virtual hardware

Ling, X. P. & Amano, H., 1993 Jan 1, PARLE 1993 - Parallel Architectures and Languages Europe - 5th International PARLE Conference, Proceedings. Bode, A., Reeve, M. & Wolf, G. (eds.). Springer Verlag, p. 610-621 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 694 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Recursive diagonal torus: An interconnection network for massively parallel computers

Yang, Y. L., Amano, H., Shibamura, H. & Sueyoshi, T., 1993 Dec 1, Proceedings of the 5th IEEE Symposium on Parallel and Distributed Processing. Anon (ed.). Publ by IEEE, p. 591-594 4 p. (Proceedings of the 5th IEEE Symposium on Parallel and Distributed Processing).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

WASMII: A data driven computer on a virtual hardware

Ling, X. P. & Amano, H., 1993 Jan 1, Proceedings - IEEE Workshop on FPGAs for Custom Computing Machines, FCCM 1993. Institute of Electrical and Electronics Engineers Inc., p. 33-42 10 p. 279481. (IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

56 Citations (Scopus)
1994

Multistage interconnection networks with multiple outlets

Hanawa, T., Amano, H. & Fujikawa, Y., 1994 Jan 1, Proceedings of the 1994 International Conference on Parallel Processing, ICPP 1994. Institute of Electrical and Electronics Engineers Inc., p. I1-I8 4115682. (Proceedings of the International Conference on Parallel Processing; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture

Sasahara, M., Terada, J., Zhou, L., Gaye, K., Yamato, J. I., Ogura, S. & Amano, H., 1994 Jan 1, Proceedings of the 1994 International Conference on Parallel Processing, ICPP 1994. Institute of Electrical and Electronics Engineers Inc., p. I117-I120 4115704. (Proceedings of the International Conference on Parallel Processing; vol. 1).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Software environment for WASMII: A data driven machine with a virtual hardware

Chen, X. Y., Ling, X. P. & Amano, H., 1994 Jan 1, Field-Programmable Logic: Architectures, Synthesis and Applications - 4th International Workshop on Field-Programmable Logic and Applications, FPL 1994, Proceedings. Hartenstein, R. W. & Servit, M. Z. (eds.). Springer Verlag, p. 208-219 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 849 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
1996

An emulation system of the WASMII: A data driven computer on a virtual hardware

Shibata, Y., Ling, X. P. & Amano, H., 1996, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1142. p. 55-64 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1142).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Attempt-1: A reconfigurable multiprocessor testbed

Inoue, K., Kisuki, T., Okuno, M., Shimizu, E., Terasawa, T. & Amano, H., 1996, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1142. p. 200-209 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1142).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
1997

Adaptive routing on the recursive diagonal torus

Funahashi, A., Hanawa, T., Kudoh, T. & Amano, H., 1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1336. p. 171-182 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1336).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A reconfigurable sensor-data processing system for personal robots

Nukata, K., Shibata, Y., Amano, H. & Anzai, Y., 1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1304. p. 491-500 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1304).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Shared vs. Snoop: Evaluation of cache structure for single-chip multiprocessors

Kisuki, T., Wakabayashi, M., Yamamoto, J., Inoue, K. & Amano, H., 1997 Dec 1, Euro-Par 1997 Parallel Processing - Third International Conference, Proceedings. p. 793-797 5 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1300 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)
1998

HOSMII: A virtual hardware integrated with DRAM

Shibata, Y., Miyazaki, H., Ling, X. P. & Amano, H., 1998, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1388. p. 85-90 6 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1388).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
1999

An educational system of LSI design with free-wares for VDEC

Morisawa, F., Kawakami, D., Tanaka, K. & Amano, H., 1999 Jan 1, Proceedings - 1999 IEEE International Conference on Microelectronic Systems Education: Systems Education in the 21st Century, MSE 1999. Institute of Electrical and Electronics Engineers Inc., p. 61-62 2 p. 787038

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A network switch using optical interconnection for high performance parallel computing using PCs: High-density implementation of high-speed signals for a one-chip electronic switch with optical interconnections

Nishimura, S., Kudoh, T., Nishi, H., Harasawa, K., Matsudaira, N., Akutsu, S., Tasyo, K. & Amano, H., 1999 Jan 1, Proceedings - 6th International Conference on Parallel Interconnects, PI 1999. Schenfeld, E., Kostuk, R., Lund, C. & Haney, M. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 5-12 8 p. 806389. (Proceedings - 6th International Conference on Parallel Interconnects, PI 1999).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Implementation and evaluation of the compiler for WASMII, a virtual hardware system

Takayama, A., Shibata, Y., Iwai, K., Miyazaki, H., Higure, K., Ling, X. P. & Amano, H., 1999 Jan 1, Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999. Institute of Electrical and Electronics Engineers Inc., p. 346-351 6 p. 800084. (Proceedings of the International Conference on Parallel Processing; vol. 1999-September).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Internal parallelization of data-driven virtual hardware

Shibata, Y., Ling, X. P. & Amano, H., 1999 Jan 1, Proceedings - 1999 lnternational Workshops on Parallel Processing, ICPP 1999. Institute of Electrical and Electronics Engineers Inc., Vol. 1999-September. p. 366-371 6 p. 800087

Research output: Chapter in Book/Report/Conference proceedingConference contribution

RHiNET A network for high performance parallel computing using locally distributed computers

Kudoh, T., Nishimura, S., Yamamoto, J., Nishi, H., Tatebe, O. & Amano, H., 1999 Jan 1, Innovative Architecture for Future Generation High-Performance Processors and Systems - 1999 International Workshop on Innovative Architectures, IWIA 1999. Nakashima, H. & Veidenbaum, A. (eds.). IEEE Computer Society, p. 69-73 5 p. 898844. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 1999-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)

The preliminary evaluation of MBP-light with two protocol policies for a massively parallel processor-JUMP-1

Hiroaki, I., Anjo, K., Yamamoto, J., Tanabe, J., Wakabayashi, M., Sato, M., Amano, H. & Hiraki, K., 1999 Jan 1, Proceedings - Frontiers 1999, 7th Symposium on the Frontiers of Massively Parallel Computation. Institute of Electrical and Electronics Engineers Inc., p. 268-275 8 p. 750609. (Proceedings - Frontiers 1999, 7th Symposium on the Frontiers of Massively Parallel Computation).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)
2000

A local area system network RHiNET-1: A network for high performance parallel computing

Nishi, H., Tasho, K., Yamamoto, J., Kudoh, T. & Amano, H., 2000 Jan 1, Proceedings - The 9th International Symposium on High-Performance Distributed Computing, HPDC 2000. Institute of Electrical and Electronics Engineers Inc., p. 296-297 2 p. 868665. (Proceedings of the IEEE International Symposium on High Performance Distributed Computing; vol. 2000-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A reconfigurable stochastic model simulator for analysis of parallel systems

Yamamoto, O., Shibata, Y., Kurosawa, H. & Amano, H., 2000, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1896. p. 475-484 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A reconfigurable stochastic model simulator for analysis of parallel systems

Yamamoto, O., Shibata, Y., Kurosawa, H. & Amano, H., 2000, IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2000-January. p. 291-292 2 p. 903422

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

A virtual hardware system on a dynamically reconfigurable logic device

Shibata, Y., Uno, M., Amano, H., Furuta, K., Fujii, T. & Motomura, M., 2000, IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2000-January. p. 295-296 2 p. 903423

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Cache coherence protocol for home proxy cache on RHiNET and its preliminary performance estimation

Nakajo, J., Ishii, M., Yamamoto, J., Kudo, T., Yokoyama, T., Tsuchiya, J. & Amano, H., 2000, Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. IEEE Computer Society, Vol. 2001-January. p. 53-60 8 p. 955197

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Dataflow partitioning and scheduling algorithms for WASMII, a virtual hardware

Takayama, A., Shibata, Y., Iwai, K. & Amano, H., 2000, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1896. p. 685-694 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

MEMOnet: Network interface plugged into a memory slot

Tanabe, N., Yamamoto, J., Nishi, H., Kudoh, T., Hamada, Y., Nakajo, H. & Amano, H., 2000 Jan 1, Proceedings - IEEE International Conference on Cluster Computing, CLUSTER 2000. Institute of Electrical and Electronics Engineers Inc., p. 17-26 10 p. 888988. (Proceedings - IEEE International Conference on Cluster Computing, ICCC; vol. 2000-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Citations (Scopus)

Reconfigurable systems: New activities in asia

Amano, H., Shibata, Y. & Uno, M., 2000, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1896. p. 585-594 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)
2001

A prototype chip of multicontext FPGA with DRAM for virtual hardware

Kawakami, D., Shibata, Y. & Amano, H., 2001 Jan 1, Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., p. 17-18 2 p. 913267. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

L-turn routing: An adaptive routing in irregular networks

Koibuchi, M., Funahashi, A., Jouraku, A. & Amano, H., 2001, Proceedings of the International Conference on Parallel Processing. Institute of Electrical and Electronics Engineers Inc., Vol. 2001-January. p. 383-392 10 p. 952084

Research output: Chapter in Book/Report/Conference proceedingConference contribution

48 Citations (Scopus)

RHiNET-3/SW: An 80-Gbit/s high-speed network switch for distributed parallel computing

Nishimura, S., Kudoh, T., Nishi, H., Yamamoto, J., Ueno, R., Harasawa, K., Fukuda, S., Shikichi, Y., Akutsu, S., Tasho, K. & Amano, H., 2001 Jan 1, HOT Interconnects 9, HIS 2001. Institute of Electrical and Electronics Engineers Inc., p. 119-123 5 p. 946703. (Proceedings - Symposium on the High Performance Interconnects, Hot Interconnects; vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)
2002

A general hardware design model for multicontext FPGAs

Kaneko, N. & Amano, H., 2002 Dec 1, Field-Programmable Logic and Applications: Reconfigurable Computing is Going Mainstream - 12th International Conference, FPL 2002, Proceedings. p. 1037-1047 11 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2438 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A low latency high bandwidth network interface prototype for PC cluster

Tanabe, N., Hamada, Y., Nakajo, H., Imashiro, H., Yamamoto, J., Kudoh, T. & Amano, H., 2002 Jan 1, International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2002. Joe, K. & Veidenbaum, A. (eds.). IEEE Computer Society, p. 87-94 8 p. 1035022. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

RHiNET/NI: A reconfigurable network interface for cluster computing

Izu, N., Yokoyama, T., Tsuchiya, J., Watanabe, K. & Amano, H., 2002 Dec 1, Field-Programmable Logic and Applications: Reconfigurable Computing is Going Mainstream - 12th International Conference, FPL 2002, Proceedings. p. 1118-1121 4 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2438 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Routing algorithms based on 2D turn model for irregular networks

Jouraku, A., Koibuchi, M., Amano, H. & Funahashi, A., 2002 Jan 1, Proceedings - International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2002. Hsu, D. F., Saldana, R. P. & Ibarra, O. H. (eds.). IEEE Computer Society, p. 289-294 6 p. 1004296. (Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN; vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)
2003

An implementation of the Rijndael on Async-WASMII

Adachi, Y., Ishikawa, K., Tsutsumi, S. & Amano, H., 2003 Jan 1, Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003. Institute of Electrical and Electronics Engineers Inc., p. 44-51 8 p. 1275730. (Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Descending layers routing: A deadlock-free deterministic routing using virtual channels in system area networks with irregular topologies

Koibuchi, M., Jouraku, A., Watanabe, K. & Amano, H., 2003 Jan 1, Proceedings - 2003 International Conference on Parallel Processing, ICPP 2003. Sadayappan, P. & Yang, C-S. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 527-536 10 p. 1240620. (Proceedings of the International Conference on Parallel Processing; vol. 2003-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

21 Citations (Scopus)

MAPLE chip: A processing element for a static scheduling centric multiprocessor

Yasufuku, K., Ogawa, R., Iwai, K. & Amano, H., 2003, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. Institute of Electrical and Electronics Engineers Inc., Vol. 2003-January. p. 575-576 2 p. 1195085

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Performance evaluation of 3-dimensional MIN with cache consistency maintenance mechanism

Tanabe, Y., Midorikawa, T., Shiraishi, D., Shigeno, M., Hanawa, T. & Amano, H., 2003 Dec 1, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2003. Arabnia, H. R., Mun, Y., Arabnia, H. R. & Mun, Y. (eds.). p. 1148-1154 7 p. (Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications; vol. 3).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Performance Evaluation of a Prototype of RHiNET-2: A Network-based Distributed Parallel Computing System

Otsuka, T., Watanabe, K., Tsuchiya, J. I., Harada, H., Yamamoto, J., Nishi, H., Kudoh, T. & Amano, H., 2003 Dec 1, 21st IASTED International Multi-Conference on Applied Informatics. p. 738-743 6 p. (IASTED International Multi-Conference on Applied Informatics; vol. 21).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Performance evaluation of instruction set architecture of MBP-light: A distributed memory controller for a large scale multiprocessor

Suzuki, N. & Amano, H., 2003 Dec 1, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2003. Arabnia, H. R., Mun, Y., Arabnia, H. R. & Mun, Y. (eds.). p. 1155-1161 7 p. (Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications; vol. 3).

Research output: Chapter in Book/Report/Conference proceedingConference contribution