• Source: Scopus
  • Calculated based on no. of publications stored in Pure and citations from Scopus
1983 …2021

Research activity per year

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  • 2003

    Performance evaluation of RHiNET 2/NI: A network interface for distributed parallel computing systems

    Watanabe, K., Otsuka, T., Tsuchiya, J. I., Amano, H., Harada, H., Yamamoto, J., Nishi, H. & Kudoh, T., 2003 Dec 1, Proceedings - CCGrid 2003: 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid. p. 318-325 8 p. 1199383. (Proceedings - CCGrid 2003: 3rd IEEE/ACM International Symposium on Cluster Computing and the Grid).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    10 Citations (Scopus)
  • Performance evaluation of routing algorithms in RHiNET-2 cluster

    Koibuchi, M., Watanabe, K., Kono, K., Jouraku, A. & Amano, H., 2003 Jan 1, Proceedings - IEEE International Conference on Cluster Computing, CLUSTER 2003. Institute of Electrical and Electronics Engineers Inc., p. 395-402 8 p. 1253339. (Proceedings - IEEE International Conference on Cluster Computing, ICCC; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    12 Citations (Scopus)
  • Prototyping on using a DIMM slot as a high-performance I/O interface

    Tanabe, N., Hamada, Y., Mitsuhashi, A., Nakajo, H., Yamamoto, J., Imashiro, H., Kudoh, T. & Amano, H., 2003 Jan 1, Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2003. Veidenbaum, A. & Joe, K. (eds.). IEEE Computer Society, p. 108-116 9 p. 1262788. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 2003-January).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)
  • The evaluation of dynamic load balancing algorithm on RHiNET-2

    Kitamura, A., Watanabe, K., Otsuka, T. & Amano, H., 2003 Dec 1, Proceedings of the Fifteenth IASTED International Conference on Parallel and Distributed Computing and Sytems. Gonzalez, T. (ed.). 1 ed. p. 262-267 6 p. (Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems; vol. 15, no. 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 2004

    A new memory module for memory intensive applications

    Tanabe, N., Hakozaki, H., Nakatake, M., Dohi, Y., Nakajo, H. & Amano, H., 2004 Dec 1, International Conference on Parallel Computing in Electrical Engineering: Workshop on System Design Automation, SDA, PARELEC 2004. p. 123-128 6 p. (International Conference on Parallel Computing in Electrical Engineering: Workshop on System Design Automation, SDA, PARELEC 2004).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Black-bus: A new data-transfer technique using local address on networks-on-chips

    Anjo, K., Yamada, Y., Koibuchi, M., Jouraku, A. & Amano, H., 2004 Dec 1, Proceedings - 18th International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM). p. 115-122 8 p. (Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM); vol. 18).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    8 Citations (Scopus)
  • Implementing and evaluating stream applications on the dynamically reconfigurable processor

    Suzuki, N., Kurotaki, S., Suzuki, M., Kaneko, N., Yamada, Y., Deguchi, K., Hasegawa, Y., Amano, H., Anjo, K., Motomura, M., Wakabayashi, K., Toi, T. & Awashima, T., 2004 Dec 1, Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004. Arnold, J. & Pocek, K. L. (eds.). p. 328-329 2 p. (Proceedings - 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    12 Citations (Scopus)
  • Stream applications on the dynamically reconfigurable processor

    Suzuki, M., Hasegawa, Y., Yamada, Y., Kaneko, N., Deguchi, K., Amano, H., Anjo, K., Motomura, M., Wakabayashi, K., Toi, T. & Awashima, T., 2004 Dec 1, Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04. Diessel, O. & Williams, J. (eds.). p. 137-144 8 p. (Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    33 Citations (Scopus)
  • 2005

    A framework for ODE-based multimodel biochemical simulations on an FPGA

    Osana, Y., Fukushima, T., Yoshimi, M., Iwaoka, Y., Funahashi, A., Hiroi, N., Shibata, Y., Iwanaga, N., Kitano, H. & Amano, H., 2005 Dec 1, Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL. p. 574-577 4 p. 1515788. (Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)
  • An adaptive cryptographic accelerator for IPsec on dynamically reconfigurable processor

    Hasegawa, Y., Abe, S., Matsutani, H., Amano, H., Anjo, K. & Awashima, T., 2005, Proceedings - 2005 IEEE International Conference on Field Programmable Technology. p. 163-170 8 p. 1568541. (Proceedings - 2005 IEEE International Conference on Field Programmable Technology; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    17 Citations (Scopus)
  • An FPGA-based, multi-model simulation method for biochemical systems

    Osana, Y., Fukushima, T., Yoshimi, M., Iwaoka, Y., Funahashi, A., Hiroi, N., Shibata, Y., Kitano, H. & Amano, H., 2005, Proceedings - 19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005. 1420035. (Proceedings - 19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • An I/O mechanism on a dynamically reconfigurable processor - Which should be moved: Data or configuration?

    Amano, H., Abe, S., Deguchi, K. & Hasegawa, Y., 2005 Dec 1, Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL. p. 347-352 6 p. 1515746. (Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • A packet forwarding layer for DIMMnet and its hardware implementation

    Hamada, Y., Nishi, H., Kitamura, A., Tanabe, N., Amano, H. & Nakajo, H., 2005 Dec 1, Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05. p. 461-467 7 p. (Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05; vol. 2).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Destination bundle: A routing table reduction technique for distributed routing on dependablenetworks-on-chips

    Matsutani, H., Koibuchi, M. & Amano, H., 2005 Dec 1, Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05. p. 1343-1349 7 p. (Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05; vol. 3).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Efficient scheduling of rate law functions for ODE-based multimodel biochemical simulation on an FPGA

    Iwanagra, N., Shibata, Y., Yoshimi, M., Osana, Y., Iwaoka, Y., Fukushima, T., Amano, H., Funahashi, A., Hiroi, N., Kitano, H. & Oguri, K., 2005 Dec 1, Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL. p. 666-669 4 p. 1515809. (Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    10 Citations (Scopus)
  • Evaluation of network interface controller on DIMMnet-2 prototype board

    Kitamura, A., Hamada, Y., Miyabe, Y., Izawa, T., Miyashiro, T., Watanabe, K., Otsuka, T., Tanabe, N., Nakajo, H. & Amano, H., 2005 Dec 1, Proceedings - Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2005. p. 778-780 3 p. 1579028. (Parallel and Distributed Computing, Applications and Technologies, PDCAT Proceedings; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Implementation of active direction-pass filter on dynamically reconfigurable processor

    Kurotaki, S., Suzuki, N., Nakadai, K., Okuno, H. G. & Amano, H., 2005, 2005 IEEE/RSJ International Conference on Intelligent Robots and Systems, IROS. IEEE Computer Society, p. 3175-3180 6 p. 1545033. (2005 IEEE/RSJ International Conference on Intelligent Robots and Systems, IROS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)
  • Implementation of ISIS-simplescalar

    Hanawa, T., Minai, T., Tanabe, Y. & Amano, H., 2005 Dec 1, Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05. p. 117-123 7 p. (Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05; vol. 1).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • Performance and cost analysis of time-multiplexed execution on the dynamically reconfigurable processor

    Amano, H., Abe, S., Hasegawa, Y., Deguchi, K. & Suzuki, M., 2005 Dec 1, Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005. p. 315-316 2 p. 1508569. (Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)
  • Preliminary evaluations of a FPGA-based-prototype of DIMMnet-2 network interface

    Tanabe, N., Kitamura, A., Miyashiro, T., Miyabe, Y., Izawa, T., Hamada, Y., Nakajo, H. & Amano, H., 2005, IWIA 2005: Innovative Architecture for Future Generation High-Performance Processors and Systems. IEEE Computer Society, p. 9-17 9 p. 1587833. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    8 Citations (Scopus)
  • RoMultiC: Fast and simple configuration data multicasting scheme for coarse grain reconfigurable devices

    Tunbunheng, V., Suzuki, M. & Amano, H., 2005 Dec 1, Proceedings - 2005 IEEE International Conference on Field Programmable Technology. p. 129-136 8 p. 1568536. (Proceedings - 2005 IEEE International Conference on Field Programmable Technology; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    38 Citations (Scopus)
  • The design of scalable stochastic biochemical simulator on FPGA

    Yoshimi, M., Osana, Y., Iwaoka, Y., Funahashi, A., Hiroi, N., Shibata, Y., Iwanaga, N., Kitano, H. & Amano, H., 2005 Dec 1, Proceedings - 2005 IEEE International Conference on Field Programmable Technology. p. 339-340 2 p. 1568590. (Proceedings - 2005 IEEE International Conference on Field Programmable Technology; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • VLAN-based minimal paths in PC cluster with ethernet on mesh and torus

    Otsuka, T., Koibuchi, M., Jouraku, A. & Amano, H., 2005 Dec 1, Proceedings - 2005 International Conference on Parallel Processing. p. 567-576 10 p. 1488655. (Proceedings of the International Conference on Parallel Processing; vol. 2005).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)
  • 2006

    A context dependent clock control mechanism for dynamically reconfigurable processors

    Amano, H., Hasegawa, Y., Abe, S., Ishikawa, K., Tsutsumi, S., Kurotaki, S., Nakamura, T. & Nishimura, T., 2006 Dec 1, Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL. p. 575-580 6 p. 4101031. (Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • A cost-effective context memory structure for dynamically reconfigurable processors

    Suzuki, M., Hasegawa, Y., Tuan, V. M., Abe, S. & Amano, H., 2006, 20th International Parallel and Distributed Processing Symposium, IPDPS 2006. IEEE Computer Society, 1639433. (20th International Parallel and Distributed Processing Symposium, IPDPS 2006; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    7 Citations (Scopus)
  • An adaptive Viterbi decoder on the dynamically reconfigurable processor

    Abe, S., Hasegawa, Y., Toi, T., Inuo, T. & Amano, H., 2006 Dec 1, Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006. p. 285-288 4 p. 4042451. (Proceedings - 2006 IEEE International Conference on Field Programmable Technology, FPT 2006).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)
  • An FPGA implementation of high throughput stochastic simulator for large-scale biochemical systems

    Yoshimi, M., Osana, Y., Iwaoka, Y., Nishikawa, Y., Kojima, T., Shibata, Y., Iwanaga, N., Funahashi, A., Hiroi, N., Kitano, H. & Amano, H., 2006 Dec 1, Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL. p. 227-232 6 p. 4100980. (Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    6 Citations (Scopus)
  • A switch-tagged VLAN routing methodology for PC clusters with Ethernet

    Otsuka, T., Koibuchi, M., Kudoh, T. & Amano, H., 2006, ICPP 2006: Proceedings of the 2006 International Conference on Parallel Processing. p. 479-486 8 p. 1690652. (Proceedings of the International Conference on Parallel Processing).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    12 Citations (Scopus)
  • DIMMnet-2: A reconfigurable board connected into a memory slot

    Miyashiro, T., Kitamura, A., Yoshimi, M., Amano, H., Nakajyo, H. & Tanabe, N., 2006 Dec 1, Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL. p. 825-828 4 p. 4101085. (Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • Enforcing dimension-order routing in on-chip torus networks without virtual channels

    Matsutani, H., Koibuchi, M. & Amano, H., 2006, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 4330. p. 207-218 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 4330).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • Hardware support for MPI in DIMMnet-2 network interface

    Tanabe, N., Kitamura, A., Miyashiro, T., Miyabe, Y., Araki, T., Luo, Z., Nakajo, H. & Amano, H., 2006 Dec 1, Proceedings - International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, IWIA 2006. p. 73-80 8 p. 4089358. (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    5 Citations (Scopus)
  • Performance/cost trade-off evaluation for the DCT implementation on the dynamically reconfigurable processor

    Tuan, V. M., Hasegawa, Y., Katsura, N. & Amano, H., 2006 Jan 1, Reconfigurable Computing: Architectures and Applications - Second International Workshop, ARC 2006, Revised Selected Papers. Springer Verlag, p. 115-121 7 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 3985 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor

    Hasegawa, Y., Abe, S., Kurotaki, S., Tuan, V. M., Katsura, N., Nakamura, T., Nishimura, T. & Amano, H., 2006, 20th International Parallel and Distributed Processing Symposium, IPDPS 2006. IEEE Computer Society, 1639431. (20th International Parallel and Distributed Processing Symposium, IPDPS 2006; vol. 2006).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • Performance evaluation of an FPGA-based biochemical simulator ReCSiP

    Osana, Y., Yoshimi, M., Iwaoka, Y., Kojima, T., Nishikawa, Y., Funahashi, A., Hiroi, N., Kitano, H., Amano, H., Shibata, Y. & Iwanaga, N., 2006 Dec 1, Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL. p. 845-850 6 p. 4101089. (Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • 2007

    A combining technique of rate law functions for a cost-effective reconfigurable biological simulator

    Yamada, H., Iwanaga, N., Shibata, Y., Osana, Y., Yoshimi, M., Iwaoka, Y., Nishikawa, Y., Kojima, T., Amano, H., Funahashi, A., Hiroi, N., Hiroaki Kitano, K. & Kiyoshi Oguri, O., 2007, Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. p. 808-811 4 p. 4380774. (Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • A framework for implementing a network-based stochastic biochemical simulator on an FPGA

    Yoshimi, M., Nishikawa, Y., Kojima, T., Osana, Y., Funahashi, A., Hiroi, N., Shibata, Y., Yamada, H., Kitano, H. & Amano, H., 2007 Dec 1, ICFPT 2007 - International Conference on Field Programmable Technology. p. 193-200 8 p. 4439249. (ICFPT 2007 - International Conference on Field Programmable Technology).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)
  • A high speed license plate recognition system on an FPGA

    Kanamori, T., Amano, H., Arai, M., Konno, D., Nanba, T. & Ajioka, Y., 2007, Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. p. 554-557 4 p. 4380715. (Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)
  • A mapping method for multi-process execution on dynamically reconfigurable processors

    Vu, M. T. & Amano, H., 2007, ICFPT 2007 - International Conference on Field Programmable Technology. p. 357-360 4 p. 4439285. (ICFPT 2007 - International Conference on Field Programmable Technology).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)
  • A temporal correlation based port combination methodology for Networks-on-Chip on reconfigurable systems

    Wang, D., Matsutani, H., Amano, H. & Koibuchi, M., 2007 Dec 1, Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. p. 383-388 6 p. 4380676. (Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • Design methodology and trade-offs analysis for parameterized dynamically reconfigurable processor arrays

    Hasegawa, Y., Tsutsumi, S., Tanbunheng, V., Nakamura, T., Nishimura, T. & Amano, H., 2007, Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. p. 796-799 4 p. 4380771. (Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • FPGA implementation of a data-driven stochastic biochemical simulator with the next reaction method

    Yoshimi, M., Iwaoka, Y., Nishikawa, Y., Kojima, T., Osana, Y., Funahashi, A., Hiroi, N., Shibata, Y., Iwanaga, N., Yamada, H., Kitano, H. & Amano, H., 2007, Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. p. 254-259 6 p. 4380656. (Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    14 Citations (Scopus)
  • Implementation and evaluation of a high speed license plate recognition system on an FPGA

    Kanamori, T., Amano, H., Arai, M., Konno, D., Nanba, T. & Ajioka, Y., 2007, CIT 2007: 7th IEEE International Conference on Computer and Information Technology. p. 567-572 6 p. 4385143. (CIT 2007: 7th IEEE International Conference on Computer and Information Technology).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    9 Citations (Scopus)
  • Message from the technical program co-chairs

    Amano, H. & Ye, A., 2007, ICFPT 2007 - International Conference on Field Programmable Technology. IEEE Computer Society, p. 5 1 p. 4439219. (ICFPT 2007 - International Conference on Field Programmable Technology).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • MuCCRA chips: Configurable dynamically-reconfigurable processors

    Amano, H., Hasegawa, Y., Tsutsumi, S., Nakamura, T., Nishimura, T., Tanbunheng, V., Parimala, A., Sano, T. & Kato, M., 2007 Dec 1, 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC. p. 384-387 4 p. 4425711. (2007 IEEE Asian Solid-State Circuits Conference, A-SSCC).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    41 Citations (Scopus)
  • Overwrite configuration technique in multicast configuration scheme for dynamically reconfigurable processor arrays

    Tsutsumi, S., Tunbunheng, V., Hasegawa, Y., Parimala, A., Nakamura, T., Nishimura, T. & Amano, H., 2007, ICFPT 2007 - International Conference on Field Programmable Technology. p. 273-276 4 p. 4439264. (ICFPT 2007 - International Conference on Field Programmable Technology).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • Performance, cost, and energy evaluation of fat H-tree: A cost-efficient tree-based on-chip network

    Matsutani, H., Koibuchi, M. & Amano, H., 2007 Sep 24, Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM. 4227999. (Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    20 Citations (Scopus)
  • Performance evaluation on low-latency communication mechanism of DIMMnet-2

    Kitamura, A., Miyabe, Y., Miyashiro, T., Tanabe, N., Nakajo, H. & Amano, H., 2007 Dec 1, Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2007. p. 57-62 6 p. (Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)
  • Performance improvement methodology for ClearSpeed's CSX600

    Nishikawa, Y., Koibuchi, M., Yoshimi, M., Miura, K. & Amano, H., 2007 Dec 1, 2007 International Conference on Parallel Processing, ICPP. 4343884. (Proceedings of the International Conference on Parallel Processing).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    5 Citations (Scopus)
  • Tightly-coupled multi-layer topologies for 3-D NoCs

    Matsutani, H., Koibuchi, M. & Amano, H., 2007, 2007 International Conference on Parallel Processing, ICPP. 4343882. (Proceedings of the International Conference on Parallel Processing).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    63 Citations (Scopus)
  • 2008

    Adding slow-silent virtual channels for low-power on-chip networks

    Matsutani, H., Koibuchi, M., Wang, D. & Amano, H., 2008 May 28, Proceedings - Second IEEE International Symposium on Networks-on-Chip, NOCS 2008. p. 23-32 10 p. 4492722. (Proceedings - Second IEEE International Symposium on Networks-on-Chip, NOCS 2008).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    34 Citations (Scopus)