• 2423 Citations
  • 23 h-Index
1983 …2020

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Conference contribution
2015

Significant papers from the first 25 years of the FPL conference

Leong, P. H. W., Amano, H., Anderson, J., Bertels, K., Cardoso, J. M. P., Diessel, O., Gogniat, G., Hutton, M., Lee, J., Luk, W., Lysaght, P., Platzner, M., Prasanna, V. K., Rissa, T., Silvano, C., So, H. & Wang, Y., 2015 Oct 7, 25th International Conference on Field Programmable Logic and Applications, FPL 2015. Institute of Electrical and Electronics Engineers Inc., 7293747

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Spatial and temporal granularity limits of body biasing in UTBB-FDSOI

Kuhn, J. M., Peterson, D., Amano, H., Bringmann, O. & Rosenstiel, W., 2015 Apr 22, Proceedings -Design, Automation and Test in Europe, DATE. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-April. p. 876-879 4 p. 7092508

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Towards unification of accelerated computing and interconnection for extreme-scale computing

Hanawa, T., Kodama, Y., Boku, T., Amano, H., Murai, H., Umemura, M. & Sato, M., 2015 Jan 1, Applied Reconfigurable Computing - 11th International Symposium, ARC 2015, Proceedings. Diniz, P. C., Sano, K., Hübner, M. & Soudris, D. (eds.). Springer Verlag, p. 463-474 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9040).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2014

A high speed design and implementation of dynamically reconfigurable processor using 28NM SOI technology

Katagiri, T. & Amano, H., 2014 Oct 16, Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014. Institute of Electrical and Electronics Engineers Inc., 6927438. (Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A low power NoC router using the marching memory through type

Yasudo, R., Kagami, T., Amano, H., Nakase, Y., Watanebe, M., Oishi, T., Shimizu, T. & Nakamura, T., 2014 Jan 1, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII. IEEE Computer Society, 6842960. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Ishibashi, K., Sugii, N., Usami, K., Amano, H., Kobayashi, K., Pham, C. K., Makiyama, H., Yamamoto, Y., Shinohara, H., Iwamatsu, T., Yamaguchi, Y., Oda, H., Hasegawa, T., Okanishi, S., Yanagita, H., Kamohara, S., Kadoshima, M., Maekawa, K., Yamashita, T., Le, D. H. & 5 others, Yomogita, T., Kudo, M., Kitamori, K., Kondo, S. & Manzawa, Y., 2014 Jan 1, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII. IEEE Computer Society, 6842954. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Citations (Scopus)

A thermal management system for building block computing systems

Fujita, Y., Usami, K. & Amano, H., 2014 Nov 6, Proceedings - 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2014. Institute of Electrical and Electronics Engineers Inc., p. 165-171 7 p. 6949468. (Proceedings - 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology

Su, H., Fujita, Y. & Amano, H., 2014 Oct 16, Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014. Institute of Electrical and Electronics Engineers Inc., 6927486. (Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

13 Citations (Scopus)

Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors

Usami, K., Kudo, M., Matsunaga, K., Kosaka, T., Tsurui, Y., Wang, W., Amano, H., Kobayashi, H., Sakamoto, R., Namiki, M., Kondo, M. & Nakamura, H., 2014 Mar 27, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings. p. 843-848 6 p. 6742995. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Design and evaluation of fine-grained power-gating for embedded microprocessors

Kondo, M., Kobyashi, H., Sakamoto, R., Wada, M., Tsukamoto, J., Namiki, M., Wang, W., Amano, H., Matsunaga, K., Kudo, M., Usami, K., Komoda, T. & Nakamura, H., 2014 Jan 1, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800359. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

Hardware/software co-design architecture for Blokus Duo solver

Sugimoto, N. & Amano, H., 2014, Proceedings of the 2014 International Conference on Field-Programmable Technology, FPT 2014. Institute of Electrical and Electronics Engineers Inc., p. 358-361 4 p. 7082820

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Low-latency wireless 3D NoCs via randomized shortcut chips

Matsutani, H., Koibuchi, M., Fujiwara, I., Kagami, T., Take, Y., Kuroda, T., Bogdan, P., Marculescu, R. & Amano, H., 2014 Jan 1, Proceedings - Design, Automation and Test in Europe, DATE 2014. Institute of Electrical and Electronics Engineers Inc., 6800487. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

32 Citations (Scopus)

Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era

Kamohara, S., Sugii, N., Yamamoto, Y., Makiyama, H., Yamashita, T., Hasegawa, T., Okanishi, S., Yanagita, H., Kadoshima, M., Maekawa, K., Mitani, H., Yamagata, Y., Oda, H., Yamaguchi, Y., Ishibashi, K., Amano, H., Usami, K., Kobayashi, K., Mizutani, T. & Hiramoto, T., 2014 Sep 8, Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc., 6894413. (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating

Usami, K., Miyauchi, M., Kudo, M., Takagi, K., Amano, H., Namiki, M., Kondo, M. & Nakamura, H., 2014 Dec 2, 2014 International Symposium on System-on-Chip, SoC 2014. Daniel, O., Ellervee, P., Milojevic, D., Nurmi, J. & Paakki, T. (eds.). Institute of Electrical and Electronics Engineers Inc., 6972438. (2014 International Symposium on System-on-Chip, SoC 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
2013

A case for wireless 3D NoCs for CMPs

Matsutani, H., Bogdan, P., Marculescu, R., Take, Y., Sasaki, D., Zhang, H., Koibuchi, M., Kuroda, T. & Amano, H., 2013 May 20, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 23-28 6 p. 6509553. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

34 Citations (Scopus)

A circuit division method for high-level synthesis on multi-FPGA systems

Daiki, K., Miyajima, T. & Amano, H., 2013 Aug 19, Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013. p. 156-161 6 p. 6550389. (Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A Co-processor design of an energy efficient reconfigurable accelerator CMA

Izawa, M., Ozaki, N., Koizumi, Y., Uno, R. & Amano, H., 2013 Dec 1, Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013. p. 148-154 7 p. 6726890. (Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A low power reconfigurable accelerator using a back-gate bias control technique

Su, H., Wang, W., Kitamori, K. & Amano, H., 2013 Dec 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 390-393 4 p. 6718395. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

An FPGA acceleration for the kd-tree search in photon mapping

Kuhara, T., Miyajima, T., Yoshimi, M. & Amano, H., 2013 Apr 3, Reconfigurable Computing: Architectures, Tools, and Applications - 9th International Symposium, ARC 2013, Proceedings. p. 25-36 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7806 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

An FPGA implementation of reconfigurable real-time vision architecture

Hiraiwa, J. & Amano, H., 2013 Aug 19, Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013. p. 150-155 6 p. 6550388. (Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Citations (Scopus)

A routing strategy for inductive-coupling based wireless 3-D NoCs by maximizing topological regularity

Sasaki, D., Zhang, H., Matsutani, H., Koibuchi, M. & Amano, H., 2013 Dec 1, Algorithms and Architectures for Parallel Processing - 13th International Conference, ICA3PP 2013, Proceedings. PART 2 ed. p. 77-85 9 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8286 LNCS, no. PART 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Artificial intelligence of Blokus Duo on FPGA using Cyber Work Bench

Sugimoto, N., Miyajima, T., Kuhara, T., Katuta, Y., Mitsuichi, T. & Amano, H., 2013 Dec 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 498-501 4 p. 6718427. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A scalable 3D heterogeneous multi-core processor with inductive-coupling ThruChip interface

Miura, N., Koizumi, Y., Sasaki, E., Take, Y., Matsutani, H., Kuroda, T., Amano, H., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2013 Aug 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547916. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A speculative gather system for cool mega-array

Uno, R., Ozaki, N., Isawa, M., Tsusaka, A., Miyajima, T. & Amano, H., 2013 Dec 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 346-349 4 p. 6718383. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links

Zhang, H., Matsutani, H., Koibuchi, M. & Amano, H., 2013 Aug 15, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI. 6547924. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2013 COOL Chips XVI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Headfirst sliding routing: A time-based routing scheme for bus-NoC hybrid 3-D architecture

Kagami, T., Matsutani, H., Koibuchi, M. & Amano, H., 2013 Aug 19, 2013 7th IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2013. 6558406. (2013 7th IEEE/ACM International Symposium on Networks-on-Chip, NoCS 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

MCMA: A modular processing elements array based low-power coarse-grained reconfigurable accelerator

Chaintreuil, R., Uno, R. & Amano, H., 2013 Jan 1, 2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013. IEEE Computer Society, 6732308. (2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Partially reconfigurable flux calculation scheme in advection term computation

Talip, M. S. A., Akamine, T., Hatto, M., Osana, Y., Fujita, N. & Amano, H., 2013 Dec 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 382-385 4 p. 6718393. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Research of PE array connection network for cool mega-array

Uno, R., Ozaki, N. & Amano, H., 2013 Aug 19, Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013. p. 144-149 6 p. 6550387. (Proceedings - 27th International Conference on Advanced Information Networking and Applications Workshops, WAINA 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Task level pipelining with PEACH2: An FPGA switching fabric for high performance computing

Miyajima, T., Kuhara, T., Hanawa, T., Amano, H. & Boku, T., 2013 Dec 1, FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology. p. 466-469 4 p. 6718416. (FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Tutorial: Introduction to interconnection networks from system area network to network on chips

Amano, H., 2013 Dec 1, Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013. p. 15-16 2 p. 6726871. (Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
2012

A case for random shortcut topologies for HPC interconnects

Koibuchi, M., Matsutani, H., Amano, H., Hsu, D. F. & Casanova, H., 2012 Aug 15, 2012 39th Annual International Symposium on Computer Architecture, ISCA 2012. p. 177-188 12 p. 6237016. (Proceedings - International Symposium on Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

80 Citations (Scopus)

A domain specific language and toolchain for OpenCV Runtime Binary Acceleration using GPU

Miyajima, T., Thomas, D. & Amano, H., 2012 Dec 1, Proceedings of the 2012 3rd International Conference on Networking and Computing, ICNC 2012. p. 175-181 7 p. 6424560. (Proceedings of the 2012 3rd International Conference on Networking and Computing, ICNC 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A multi-Vdd dynamic variable-pipeline on-chip router for CMPs

Matsutani, H., Hirata, Y., Koibuchi, M., Usami, K., Nakamura, H. & Amano, H., 2012 Apr 26, ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference. p. 407-412 6 p. 6164982. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

A study of adaptable co-processors for cyclic redundancy check on an FPGA

Akagic, A. & Amano, H., 2012 Dec 1, FPT 2012 - 2012 International Conference on Field-Programmable Technology. p. 119-124 6 p. 6412122. (FPT 2012 - 2012 International Conference on Field-Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Castle of chips: A new chip stacking structure with wireless inductive coupling for large scale 3-D multicore systems

Amano, H., 2012 Dec 14, Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012. p. 820-825 6 p. 6354931. (Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

CMA-2: The second prototype of a low power reconfigurable accelerator

Izawa, M., Ozaki, N., Yasuda, Y., Kimura, M. & Amano, H., 2012 Apr 26, ASP-DAC 2012 - 17th Asia and South Pacific Design Automation Conference. p. 471-472 2 p. 6164996. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect

Koizumi, Y., Sasaki, E., Amano, H., Matsutani, H., Take, Y., Kuroda, T., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2012 Dec 12, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 543-546 4 p. 6339375. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Cost effective implementation of flux limiter functions using partial reconfiguration

Abu Talip, M. S., Akamine, T., Osana, Y., Fujita, N. & Amano, H., 2012 Apr 11, Reconfigurable Computing: Architectures, Tools and Applications - 8th International Symposium, ARC 2012, Proceedings. p. 215-226 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7199 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Dynamically reconfigurable flux limiter functions in MUSCL scheme

Talip, M. S. A., Akamine, T., Osana, Y., Fujita, N. & Amano, H., 2012 Nov 23, ReCoSoC 2012 - 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Proceedings. 6322878. (ReCoSoC 2012 - 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect

Koizumi, Y., Amano, H., Matsutani, H., Miura, N., Kuroda, T., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2012 Dec 1, FPT 2012 - 2012 International Conference on Field-Programmable Technology. p. 293-296 4 p. 6412150. (FPT 2012 - 2012 International Conference on Field-Programmable Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Extension of memory controller equipped with MuCCRA-3-DP: Dynamically reconfigurable processor array

Katagiri, T., Hironaka, K. & Amano, H., 2012 Dec 14, Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012. p. 826-831 6 p. 6354932. (Proceedings of the 2012 15th International Conference on Network-Based Information Systems, NBIS 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Performance analysis of fully-adaptable CRC accelerators on an FPGA

Akagic, A. & Amano, H., 2012 Dec 12, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 575-578 4 p. 6339374. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Reconfigurable out-of-order mechanism generator for unstructured grid computation in computational fluid dynamics

Akamine, T., Inakagata, K., Osana, Y., Fujita, N. & Amano, H., 2012 Dec 12, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 136-142 7 p. 6339277. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Trade-off analysis of fine-grained power gating methods for functional units in a CPU

Wang, W., Ohta, Y., Ishii, Y., Usami, K. & Amano, H., 2012 Jul 25, Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV. 6216587. (Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Vertical link on/off control methods for wireless 3-D NoCs

Zhang, H., Matsutani, H., Take, Y., Kuroda, T. & Amano, H., 2012 Feb 28, Architecture of Computing Systems, ARCS 2012 - 25th International Conference, Proceedings. p. 212-224 13 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7179 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)
2011

A 2.72GOPS/11mW low power reconfigurable accelerator with a highly parallel datapath consisting of combinatorial circuits in 65nm CMOS

Ozaki, N., Yasuda, Y., Saito, Y., Ikebuchi, D., Kimura, M., Amano, H., Nakamura, H., Usami, K., Namiki, M. & Kondo, M., 2011 Dec 1, 2011 International Symposium on Integrated Circuits, ISIC 2011. p. 579-584 6 p. 6131929. (2011 International Symposium on Integrated Circuits, ISIC 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

A design of one-dimensional Euler equations for fluid dynamics on FPGA

Abu Talip, M. S. & Amano, H., 2011 Aug 23, Proceedings of 2011 1st International Symposium on Access Spaces, ISAS 2011. p. 170-173 4 p. 5960942. (Proceedings of 2011 1st International Symposium on Access Spaces, ISAS 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A dynamic link-width optimization for network-on-chip

Wang, D., Koibuchi, M., Yoneda, T., Matsutani, H. & Amano, H., 2011 Dec 1, Proceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011. p. 106-108 3 p. 602900. (Proceedings - 1st International Workshop on Cyber-Physical Systems, Networks, and Applications, CPSNA 2011, Workshop Held During RTCSA 2011; vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

A vertical bubble flow network using inductive-coupling for 3-D CMPs

Matsutani, H., Take, Y., Sasaki, D., Kimura, M., Ono, Y., Nishiyama, Y., Koibuchi, M., Kuroda, T. & Amano, H., 2011 Jul 19, NOCS 2011: The 5th ACM/IEEE International Symposium on Networks-on-Chip. p. 49-56 8 p. (NOCS 2011: The 5th ACM/IEEE International Symposium on Networks-on-Chip).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Citations (Scopus)