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Research Output 1983 2019

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2019

A fine-grained multicasting of configuration data for coarse-grained reconfigurable architectures

Kojima, T. & Amano, H., 2019 Jan 1, In : IEICE Transactions on Information and Systems. E102D, 7, p. 1247-1256 10 p.

Research output: Contribution to journalArticle

Open Access
Reconfigurable architectures
Multicasting
Processing
Program processors
Energy utilization
2018

Analysis of body bias control using overhead conditions for real time systems: A practical approach

Torres, C. C. C., Okuhara, H., Yamasaki, N. & Amano, H., 2018 Apr 1, In : IEICE Transactions on Information and Systems. E101D, 4, p. 1116-1125 10 p.

Research output: Contribution to journalArticle

Real time systems
Embedded systems
Energy efficiency
Silicon
2 Citations (Scopus)

Asymmetric Body Bias Control With Low-Power FD-SOI Technologies: Modeling and Power Optimization

Okuhara, H., Ben Ahmed, A., Kuhn, J. M. & Amano, H., 2018 Mar 23, (Accepted/In press) In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Research output: Contribution to journalArticle

Power control
Silicon on insulator technology
Testing
Electric potential
Microcontrollers

Body Bias Control for Renewable Energy Source with a High Inner Resistance

Azegami, K., Okuhara, H. & Amano, H., 2018 Apr 16, (Accepted/In press) In : IEEE Transactions on Multi-Scale Computing Systems.

Research output: Contribution to journalArticle

Stars
Solar cells
Bias voltage
Sensor nodes
Leakage currents

Designing High-Performance Interconnection Networks with Host-Switch Graphs

Yasudo, R., Koibuchi, M., Nakano, K., Matsutani, H. & Amano, H., 2018 Aug 6, (Accepted/In press) In : IEEE Transactions on Parallel and Distributed Systems.

Research output: Contribution to journalArticle

Switches
Topology
Distributed computer systems
Network performance
Oils and fats

Digitally Assisted On-Chip Body Bias Tuning Scheme for Ultra Low-Power VLSI Systems

Okuhara, H., Ben Ahmed, A. & Amano, H., 2018 Mar 13, (Accepted/In press) In : IEEE Transactions on Circuits and Systems I: Regular Papers.

Research output: Contribution to journalArticle

Tuning
Electric potential
Silicon on insulator technology
Analog circuits
Bias voltage
1 Citation (Scopus)

Optimization of body biasing for variable pipelined coarse-grained reconfigurable architectures

Kojima, T., Ando, N., Okuhara, H., Doan, N. A. V. & Amano, H., 2018 Jun 1, In : IEICE Transactions on Information and Systems. E101D, 6, p. 1532-1540 9 p.

Research output: Contribution to journalArticle

Reconfigurable architectures
Pipelines
Bias voltage
Silicon
Energy utilization

Proxy responses by FPGA-based switch for MapReduce stragglers

Mitsuzuka, K., Koibuchi, M., Amano, H. & Matsutani, H., 2018 Sep 1, In : IEICE Transactions on Information and Systems. E101D, 9, p. 2258-2268 11 p.

Research output: Contribution to journalArticle

Field programmable gate arrays (FPGA)
Switches
Ethernet
Communication
Processing
2017
1 Citation (Scopus)

A layout-oriented routing method for low-latency HPC networks

Kawano, R., Nakahara, H., Fujiwara, I., Matsutani, H., Koibuchi, M. & Amano, H., 2017 Dec 1, In : IEICE Transactions on Information and Systems. E100D, 12, p. 2796-2807 12 p.

Research output: Contribution to journalArticle

Scalability
Ion exchange
Switches
Throughput
1 Citation (Scopus)

A novel channel assignment method to ensure deadlock-freedom for deterministic routing

Kawano, R., Nakahara, H., Tade, S., Fujiwara, I., Matsutani, H., Koibuchi, M. & Amano, H., 2017 Aug 1, In : IEICE Transactions on Information and Systems. E100D, 8, p. 1798-1806 9 p.

Research output: Contribution to journalArticle

Scalability
Switches
Topology
Data storage equipment

Body bias domain partitioning size exploration for a coarse grained reconfigurable accelerator

Matsushita, Y., Okuhara, H., Masuyama, K., Fujita, Y., Kawano, R. & Amano, H., 2017 Dec 1, In : IEICE Transactions on Information and Systems. E100D, 12, p. 2828-2836 9 p.

Research output: Contribution to journalArticle

Particle accelerators
Bias voltage
Threshold voltage
Transistors
Genetic algorithms
1 Citation (Scopus)

Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers

Yasudo, R., Matsutani, H., Koibuchi, M., Amano, H. & Nakamura, T., 2017 Apr 1, In : IEEE Transactions on Computers. 66, 4, p. 702-716 15 p., 7562562.

Research output: Contribution to journalArticle

Router
Routers
Decentralized
Count
Many-core
1 Citation (Scopus)

The first 25 years of the FPL conference: Significant papers

Leong, P. H. W., Amano, H., Anderson, J., Bertels, K., Cardoso, J. M. P., Diessel, O., Gogniat, G., Hutton, M., Lee, J., Luk, W., Lysaght, P., Platzner, M., Prasanna, V. K., Rissa, T., Silvano, C., So, H. K. H. & Wang, Y., 2017 Mar 1, In : ACM Transactions on Reconfigurable Technology and Systems. 10, 2, 15.

Research output: Contribution to journalArticle

Engineering technology
Information technology
2016

An operating system guided fine-grained power gating control based on runtime characteristics of applications

Koshiba, A., Sato, M., Usami, K., Amano, H., Sakamoto, R., Kondo, M., Nakamura, H. & Namiki, M., 2016 Aug 1, In : IEICE Transactions on Electronics. E99C, 8, p. 926-935 10 p.

Research output: Contribution to journalArticle

Electric power utilization
Application programs
Computer monitors
Networks (circuits)
Computer architecture
2 Citations (Scopus)

Multi-voltage variable pipeline routers with the same clock frequency for low-power network-on-chips systems

Ahmed, A. B., Matsutani, H., Koibuchi, M., Usami, K. & Amano, H., 2016 Aug 1, In : IEICE Transactions on Electronics. E99C, 8, p. 909-917 9 p.

Research output: Contribution to journalArticle

Routers
Clocks
Pipelines
Electric potential
Network-on-chip
2 Citations (Scopus)

Novel chip stacking methods to extend both horizontally and vertically for many-core architectures with ThrouChip interface

Nakahara, H., Ozaki, T., Matsutani, H., Koibuchi, M. & Amano, H., 2016 Dec 1, In : IEICE Transactions on Information and Systems. E99D, 12, p. 2871-2880 10 p.

Research output: Contribution to journalArticle

Large scale systems
Costs
Masks
System-on-chip
11 Citations (Scopus)

Optical network technologies for HPC: Computer-architects point of view

Koibuchi, M., Fujiwara, I., Ishii, K., Namiki, S., Chaix, F., Matsutani, H., Amano, H. & Kudoh, T., 2016 Mar 25, In : IEICE Electronics Express. 13, 6

Research output: Contribution to journalArticle

Fiber optic networks
Switching circuits
Telecommunication links
Electric switches
Space optics
8 Citations (Scopus)

Power Optimization Methodology for Ultralow Power Microcontroller With Silicon on Thin BOX MOSFET

Okuhara, H., Fujita, Y., Usami, K. & Amano, H., 2016 Dec 30, (Accepted/In press) In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Research output: Contribution to journalArticle

Microcontrollers
Silicon
Bias voltage
Temperature
Electric potential
2015
2 Citations (Scopus)

A fine-grained power gating control on linux monitoring power consumption of processor functional units

Koshiba, A., Wada, M., Sakamoto, R., Sato, M., Kosaka, T., Usami, K., Amano, H., Kondo, M., Nakamura, H. & Namiki, M., 2015 Jul 1, In : IEICE Transactions on Electronics. E98C, 7, p. 559-568 10 p.

Research output: Contribution to journalArticle

Electric power utilization
Monitoring
Electric potential
Microprocessor chips
Switches
16 Citations (Scopus)

A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Ishibashi, K., Sugii, N., Kamohara, S., Usami, K., Amano, H., Kobayashi, K. & Pham, C. K., 2015 Jul 1, In : IEICE Transactions on Electronics. E98C, 7, p. 536-543 8 p.

Research output: Contribution to journalArticle

Program processors
Wearable computers
Harvesters
Energy harvesting
Silicon

A toolchain for dynamic function off-load on CPU-FPGA platforms

Miyajima, T., Thomas, D. & Amano, H., 2015, In : Journal of Information Processing. 23, 2, p. 153-162 10 p.

Research output: Contribution to journalArticle

Program processors
Field programmable gate arrays (FPGA)
Pipelines
Loaders
Computer hardware

Courier: A toolchain for application acceleration on heterogeneous platforms

Miyajima, T., Thomas, D. & Amano, H., 2015 Feb 1, In : IPSJ Transactions on System LSI Design Methodology. 8, p. 105-115 11 p.

Research output: Contribution to journalArticle

Particle accelerators
Fast Fourier transforms
Spectrum analysis
Image processing
Industry
12 Citations (Scopus)

Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces

Kagami, T., Matsutani, H., Koibuchi, M., Take, Y., Kuroda, T. & Amano, H., 2015 Apr 14, (Accepted/In press) In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Research output: Contribution to journalArticle

Time division multiple access
Carrier sense multiple access
Communication
Energy transfer
Interfaces (computer)
2014
30 Citations (Scopus)

3D NoC with inductive-coupling links for building-block SiPs

Take, Y., Matsutani, H., Sasaki, D., Koibuchi, M., Kuroda, T. & Amano, H., 2014, In : IEEE Transactions on Computers. 63, 3, p. 748-763 16 p., 6331480.

Research output: Contribution to journalArticle

Transceivers
Building Blocks
Telecommunication links
Chip
Ring Network
2 Citations (Scopus)

Dynamic power consumption optimization for inductive-coupling based wireless 3D NoCs

Zhang, H., Matsutani, H., Koibuchi, M. & Amano, H., 2014 Feb, In : IPSJ Transactions on System LSI Design Methodology. 7, p. 27-36 10 p.

Research output: Contribution to journalArticle

Electric power utilization
Telecommunication links
Topology
Bias voltage
Transmitters
1 Citation (Scopus)

Reconfigurable out-of-order system for fluid dynamics computation using unstructured mesh

Akamine, T., Abu Talip, M. S., Osana, Y., Fujita, N. & Amano, H., 2014, In : IEICE Transactions on Information and Systems. E96-D, 5, p. 1225-1234 10 p.

Research output: Contribution to journalArticle

Fluid dynamics
Aerodynamics
Subroutines
Hazards
Computational fluid dynamics
2013
18 Citations (Scopus)

A scalable 3D heterogeneous multicore with an inductive ThruChip interface

Miura, N., Koizumi, Y., Take, Y., Matsutani, H., Kuroda, T., Amano, H., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2013 Nov, In : IEEE Micro. 33, 6, p. 6-15 10 p., 6684194.

Research output: Contribution to journalArticle

Particle accelerators
Program processors
Costs
Energy utilization
Communication

Fine-grained run-tume power gating through co-optimization of circuit, architecture, and system software design

Nakamura, H., Wang, W., Ohta, Y., Usami, K., Amano, H., Kondo, M. & Namiki, M., 2013 Apr, In : IEICE Transactions on Electronics. E96-C, 4, p. 404-412 9 p.

Research output: Contribution to journalArticle

Software design
Networks (circuits)
Electric power utilization
Power control
Geysers

High-speed fully-adaptable CRC accelerators

Akagic, A. & Amano, H., 2013 Jun, In : IEICE Transactions on Information and Systems. E96-D, 6, p. 1299-1308 10 p.

Research output: Contribution to journalArticle

Particle accelerators
Redundancy
Field programmable gate arrays (FPGA)
Hardware
Shift registers

Message from the general chair and program co-chairs

Amano, H., Ha, Y. & Yamaguchi, Y., 2013, In : Unknown Journal. 6718314.

Research output: Contribution to journalArticle

Message from the IEEE MCSoC-13 program and steering chairs

Amano, H. & Abdallah, A. B., 2013, In : Unknown Journal. 6657892.

Research output: Contribution to journalArticle

Message from WReCS 2013 workshop co-chairs

Amano, H. & Uehara, M., 2013, In : Unknown Journal. 6550304.

Research output: Contribution to journalArticle

Special section on parallel and distributed computing and networking

Amano, H., 2013 Dec, In : IEICE Transactions on Information and Systems. E96-D, 12, p. 2513 1 p.

Research output: Contribution to journalArticle

Distributed computer systems
Parallel processing systems

Special section on reconfigurable systems

Amano, H., 2013, In : IEICE Transactions on Information and Systems. E96-D, 8, p. 1581 1 p.

Research output: Contribution to journalArticle

Vertical link on/off regulations for inductive-coupling based wireless 3-D NoCs

Zhang, H., Matsutani, H., Take, Y., Kuroda, T. & Amano, H., 2013 Dec, In : IEICE Transactions on Information and Systems. E96-D, 12, p. 2753-2764 12 p.

Research output: Contribution to journalArticle

Telecommunication links
Routers
Transmitters
Electric power utilization
Clocks
2012

Message from the organizers

Amano, H., Nakamura, M., MacLoughlin, I. V., Yoshinaga, T., Fujita, S. & Nakano, K., 2012, In : Unknown Journal. 6424529.

Research output: Contribution to journalArticle

Message from WReCS 2012 workshop co-chairs

Amano, H. & Uehara, M., 2012, In : Unknown Journal. 6354991.

Research output: Contribution to journalArticle

Partial reconfiguration of flux limiter functions in MUSCL scheme using FPGA

Abu Talip, M. S., Akamine, T., Osana, Y., Fujita, N. & Amano, H., 2012 Oct, In : IEICE Transactions on Information and Systems. E95-D, 10, p. 2369-2376 8 p.

Research output: Contribution to journalArticle

Limiters
Field programmable gate arrays (FPGA)
Fluxes
Computational fluid dynamics
Aerospace industry

Special section on parallel and distributed computing and networking

Amano, H., 2012 Dec, In : IEICE Transactions on Information and Systems. E95-D, 12, p. 2749 1 p.

Research output: Contribution to journalArticle

Distributed computer systems
Parallel processing systems

Special section on reconfigurable systems

Amano, H., 2012 Feb, In : IEICE Transactions on Information and Systems. E95-D, 2, p. 293 1 p.

Research output: Contribution to journalArticle

2011

A leakage efficient data TLB design for embedded processors

Lei, Z., Xu, H., Ikebuchi, D., Sunata, T., Namiki, M. & Amano, H., 2011 Jan, In : IEICE Transactions on Information and Systems. E94-D, 1, p. 51-59 9 p.

Research output: Contribution to journalArticle

Physical addresses
Electric potential
Degradation

A leakage efficient instruction TLB design for embedded processors

Lei, Z., Xu, H., Ikebuchi, D., Sunata, T., Namiki, M. & Amano, H., 2011 Aug, In : IEICE Transactions on Information and Systems. E94-D, 8, p. 1565-1574 10 p.

Research output: Contribution to journalArticle

Degradation
Electric potential

An analytical network performance model for SIMD processor CSX600 interconnects

Nishikawa, Y., Koibuchi, M., Yoshimi, M., Miura, K. & Amano, H., 2011 Jan, In : Journal of Systems Architecture. 57, 1, p. 146-159 14 p.

Research output: Contribution to journalArticle

Network performance
Communication
Schematic diagrams
Processing
Tuning
4 Citations (Scopus)

A switch-tagged routing methodology for PC clusters with VLAN Ethernet

Koibuchi, M., Otsuka, T., Kudoh, T. & Amano, H., 2011, In : IEEE Transactions on Parallel and Distributed Systems. 22, 2, p. 217-230 14 p., 5445093.

Research output: Contribution to journalArticle

Ethernet
Switches
Topology
Routing algorithms
Communication
37 Citations (Scopus)

Cool mega-arrays: Ultralow-power reconfigurable accelerator chips

Ozaki, N., Yasuda, Y., Izawa, M., Saito, Y., Ikebuchi, D., Amano, H., Nakamura, H., Usami, K., Namiki, M. & Kondo, M., 2011 Nov, In : IEEE Micro. 31, 6, p. 6-18 13 p., 6060791.

Research output: Contribution to journalArticle

Particle accelerators
Data flow graphs
Data storage equipment
Microcontrollers
Mobile devices
2 Citations (Scopus)

Design and implementation fine-grained power gating on microprocessor functional units

Lei, Z., Ikebuchi, D., Usami, K., Namiki, M., Kondo, M., Nakamura, H. & Amano, H., 2011, In : IPSJ Transactions on System LSI Design Methodology. 4, p. 182-192 11 p.

Research output: Contribution to journalArticle

Microprocessor chips
Electric power utilization

Design and implementation of echo instructions for an embedded processor

Arda, K., Iver, S. & Amano, H., 2011, In : IPSJ Transactions on System LSI Design Methodology. 4, p. 222-231 10 p.

Research output: Contribution to journalArticle

Embedded systems
Data storage equipment

Iterative synthesis methods estimating programmable-wire congestion in a dynamically reconfigurable processor

Toi, T., Okamoto, T., Awashima, T., Wakabayashi, K. & Amano, H., 2011 Dec, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E94-A, 12, p. 2619-2627 9 p.

Research output: Contribution to journalArticle

Congestion
Wire
Synthesis
Critical Path
Scheduler
27 Citations (Scopus)

Performance, area, and power evaluations of ultrafine-grained run-time power-gating routers for CMPs

Matsutani, H., Koibuchi, M., Ikebuchi, D., Usami, K., Nakamura, H. & Amano, H., 2011 Apr, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30, 4, p. 520-533 14 p., 5737865.

Research output: Contribution to journalArticle

Routers
Application programs
Communication