• 2423 Citations
  • 23 h-Index
1983 …2020

Research output per year

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Research Output

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Article
1985

Performance analysis of parallel machines using multi‐read memory

Amano, H., Chikawa, J., Yoshida, T. & Also, H., 1985, In : Systems and Computers in Japan. 16, 3, p. 29-37 9 p.

Research output: Contribution to journalArticle

1986

Dynamic fault recovery in mesh‐connected parallel computers

Yokota, T., Amano, H. & Aiso, H., 1986, In : Systems and Computers in Japan. 17, 7, p. 10-18 9 p.

Research output: Contribution to journalArticle

VLSI SWITCH FOR A DIGITAL PBX.

Purba, S. H., Amano, H., Shobatake, Y. & Aiso, H., 1986 Jul 1, In : Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. E69, 7, p. 771-774 4 p.

Research output: Contribution to journalArticle

1987

COMPATIBLE ACKNOWLEDGING ETHERNET.

Saito, T., Tokoro, M. & Amano, H., 1987 Oct 1, In : Transactions of the Institute of Electronics, Information and Communication Engineers, Section E (. E70, 10, p. 960-967 8 p.

Research output: Contribution to journalArticle

1990

(SM)2-II: A Large-Scale Multiprocessor for Sparse Matrix Calculations

Amano, H., Boku, T. & Kudoh, T., 1990 Jul, In : IEEE Transactions on Computers. 39, 7, p. 889-905 17 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)
1991

NCC: A concurrent description language for scientific calculation on multiprocessors

Boku, T., Kudoh, T., Amano, H. & Kimura, T., 1991, In : Systems and Computers in Japan. 22, 12, p. 1-10 10 p.

Research output: Contribution to journalArticle

1993

A query‐based parallel logic simulation algorithm

Kudoh, T., Kimura, T., Amano, H. & Terasawa, T., 1993, In : Systems and Computers in Japan. 24, 2, p. 11-21 11 p.

Research output: Contribution to journalArticle

1995

A performance evaluation of the multiprocessor testbed ATTEMPT-0

Terasawa, T., Yamamoto, O., Kudoh, T. & Amano, H., 1995 May, In : Parallel Computing. 21, 5, p. 701-730 30 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)

Neural network parallel computing for multi-layer channel routing problems

Suzuki, K., Amano, H. & Takefuji, Y., 1995 Jul, In : Neurocomputing. 8, 2, p. 141-156 16 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

WASMII: An MPLD with data-driven control on a virtual hardware

Ling, X. & Amano, H., 1995 Sep 1, In : The Journal of Supercomputing. 9, 3, p. 253-276 24 p.

Research output: Contribution to journalArticle

11 Citations (Scopus)
1996

Fault tolerance of the TBSF (Tandem Banyan Switching Fabrics) and PBSF (Piled Banyan Switching Fabrics)

Funahashi, A., Hanawa, T. & Amano, H., 1996 Jan 1, In : IEICE Transactions on Information and Systems. E79-D, 8, p. 1180-1189 10 p.

Research output: Contribution to journalArticle

Recursive diagonal torus (RDT): An interconnection network for the massively parallel computers

Yang, Y., Amano, H., Shibamura, H. & Sueyoshi, T., 1996 Aug, In : Systems and Computers in Japan. 27, 9, p. 43-54 12 p.

Research output: Contribution to journalArticle

The MDX (Multi-Dimensional X'bar): A class of networks for large scale multiprocessors

Murata, A., Boku, T. & Amano, H., 1996 Jan 1, In : IEICE Transactions on Information and Systems. E79-D, 8, p. 1116-1123 8 p.

Research output: Contribution to journalArticle

Umessage transfer algorithms an the recursive diagonal torus

Yang, Y. & Amano, H., 1996 Jan 1, In : IEICE Transactions on Information and Systems. E79-D, 2, p. 107-116 10 p.

Research output: Contribution to journalArticle

8 Citations (Scopus)
1997

MINC: Multistage interconnection network with cache control mechanism

Hanawa, T., Kamei, T., Yasukawa, H., Nishimura, K., Amano, H. & Tsudat, N., 1997 Jan 1, In : IEICE Transactions on Information and Systems. E80-D, 9, p. 863-870 8 p.

Research output: Contribution to journalArticle

4 Citations (Scopus)

The RDT Router Chip: A Versatile Router for Supporting a Distributed Shared Memory

Nishü, H., Anjqt, K. I., Kudoh, T. & Amano, H., 1997 Jan 1, In : IEICE Transactions on Information and Systems. E80-D, 9, p. 854-861 8 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)
1998

An analysis of fairness and overhead in the arbitration protocol of the IEEE futurebus standard

Yamamoto, O., Terasawa, T. & Amano, H., 1998 Nov 30, In : Systems and Computers in Japan. 29, 13, p. 66-77 12 p.

Research output: Contribution to journalArticle

A study on snoop cache systems for single-chip multiprocessors

Terasawa, T., Inoue, K., Kurosawa, H. & Amano, H., 1998 Feb, In : Systems and Computers in Japan. 28, 2, p. 62-72 11 p.

Research output: Contribution to journalArticle

Design and implementation of reconfigurable sensing system for networked robots

Miyajima, A., Nukata, K., Amano, H. & Anzai, Y., 1998 Jan 1, In : Advanced Robotics. 13, 3, p. 253-254 2 p.

Research output: Contribution to journalArticle

Wavelength division multiple access ring - Virtual topology on a simple ring network

Donc, X., Kudoh, T. & Amano, H., 1998 Jan 1, In : IEICE Transactions on Information and Systems. E81-D, 4, p. 345-354 10 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)
1999

A routing algorithm for multihop WDM ring

Bong, X., Kudoh, T. & Amano, H., 1999 Jan 1, In : IEICE Transactions on Information and Systems. E82-D, 2, p. 422-430 9 p.

Research output: Contribution to journalArticle

Performance evaluation of SNAIL: A multiprocessor based on the Simple Serial Synchronized Multistage Interconnection Network architecture

Yamamoto, J., Fujiwara, T., Komeda, T., Kamei, T., Hanawa, T. & Amano, H., 1999 Sep, In : Parallel Computing. 25, 9, p. 1081-1103 23 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)
2000

64-Gb/s highly reliable network switch (RHiNET-2/SW) using parallel optical interconnection

Nishimura, S., Kudoh, T., Nishi, H., Yamamoto, J., Harasawa, K., Matsudaira, N., Akutsu, S. & Amano, H., 2000 Dec 1, In : Journal of Lightwave Technology. 18, 12, p. 1620-1627 8 p.

Research output: Contribution to journalArticle

6 Citations (Scopus)
2001

A network switch for supporting high-performance parallel processing by computers distributed in local areas

Nishi, H., Tasho, K., Kudoh, T. & Amano, H., 2001 Dec 1, In : Systems and Computers in Japan. 32, 14, p. 24-33 10 p.

Research output: Contribution to journalArticle

Recursive diagonal torus: An interconnection network for massively parallel computers

Yang, Y., Funahashi, A., Jouraku, A., Nishi, H., Amano, H. & Sueyoshi, T., 2001 Jul 1, In : IEEE Transactions on Parallel and Distributed Systems. 12, 7, p. 701-715 15 p.

Research output: Contribution to journalArticle

52 Citations (Scopus)
2003

A Dynamically Adaptive Hardware on Dynamically Reconfigurable Processor

Amano, H., Jouraku, A. & Anjo, K., 2003 Dec, In : IEICE Transactions on Communications. E86-B, 12, p. 3385-3391 7 p.

Research output: Contribution to journalArticle

10 Citations (Scopus)
6 Citations (Scopus)

Architecture and Evaluation of a Third-Generation RHiNET Switch for High-Performance Parallel Computing

Nishi, H., Nishimura, S., Harasawa, K., Kudoh, T. & Amano, H., 2003 Oct, In : IEICE Transactions on Information and Systems. E86-D, 10, p. 1987-1995 9 p.

Research output: Contribution to journalArticle

Design and Implementation of RHiNET-2/NI0: A Reconfigurable Network Interface for Cluster Computing

Yokoyama, T., Izu, N., Tsuchiya, J. I., Watanabe, K., Amano, H. & Kudoh, T., 2003 May, In : IEICE Transactions on Information and Systems. E86-D, 5, p. 789-795 7 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

Implementation of Data Driven Applications on a Multi-Context Reconfigurable Device

Uno, M., Shibata, Y. & Amano, H., 2003 May, In : IEICE Transactions on Information and Systems. E86-D, 5, p. 841-849 9 p.

Research output: Contribution to journalArticle

4 Citations (Scopus)

Performance Evaluation of Instruction Set Architecture of MBP-Light in JUMP-1

Suzuki, N. & Amano, H., 2003 Oct, In : IEICE Transactions on Information and Systems. E86-D, 10, p. 1996-2005 10 p.

Research output: Contribution to journalArticle

Pot: A General Purpose Monitor for Parallel Computers

Kanamori, Y., Minabe, O., Wakabayashi, M. & Amano, H., 2003 Oct, In : IEICE Transactions on Information and Systems. E86-D, 10, p. 2025-2033 9 p.

Research output: Contribution to journalArticle

15 Citations (Scopus)
2004

Folded fat H-Tree: An interconnection topology for dynamically reconfigurable processor array

Yamada, Y., Amano, H., Koibuchi, M., Jouraku, A., Anjo, K. & Nishimura, K., 2004 Dec 1, In : Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3207, p. 301-311 11 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)

Stochastic simulation for biochemical reactions on FPGA

Yoshimi, M., Osana, Y., Fukushima, T. & Amano, H., 2004 Dec 1, In : Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3203, p. 105-114 10 p.

Research output: Contribution to journalArticle

19 Citations (Scopus)
13 Citations (Scopus)
2005

MMLRU selection function: A simple and efficient output selection function in adaptive routing

Koibuchi, M., Jouraku, A. & Amano, H., 2005 Jan, In : IEICE Transactions on Information and Systems. E88-D, 1, p. 109-118 10 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)

Path selection algorithm: The strategy for designing deterministic routing from alternative paths

Koibuchi, M., Jouraku, A. & Amano, H., 2005 Jan 1, In : Parallel Computing. 31, 1, p. 117-130 14 p.

Research output: Contribution to journalArticle

4 Citations (Scopus)

Performance evaluation of deterministic routings, multicasts, and topologies on RHiNET-2 cluster

Koibuchi, M., Watanabe, K., Otsuka, T. & Amano, H., 2005 Aug 1, In : IEEE Transactions on Parallel and Distributed Systems. 16, 8, p. 747-759 13 p.

Research output: Contribution to journalArticle

7 Citations (Scopus)

The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism)

Midorikawa, T., Shiraishi, D., Shigeno, M., Tanabe, Y., Hanawa, T. & Amano, H., 2005 Mar 1, In : Parallel Computing. 31, 3-4, p. 352-370 19 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)
2006

A simple data transfer technique using local address for networks-on-chips

Koibuchi, M., Anjo, K., Yamada, Y., Jouraku, A. & Amano, H., 2006 Dec 1, In : IEEE Transactions on Parallel and Distributed Systems. 17, 12, p. 1425-1437 13 p.

Research output: Contribution to journalArticle

16 Citations (Scopus)
2 Citations (Scopus)
2007

An effective design of deadlock-free routing algorithms based on 2D turn model for irregular networks

Jouraku, A., Koibuchi, M. & Amano, H., 2007 Mar 1, In : IEEE Transactions on Parallel and Distributed Systems. 18, 3, p. 320-333 14 p.

Research output: Contribution to journalArticle

25 Citations (Scopus)

A port combination methodology for application-specific networks-on-chip on FPGAS

Wang, D., Matsutani, H., Koibuchi, M. & Amano, H., 2007 Dec, In : IEICE Transactions on Information and Systems. E90-D, 12, p. 1914-1922 9 p.

Research output: Contribution to journalArticle

Data multicasting procedure for increasing configuration speed of coarse grain reconfigurable devices

Tunbunheng, V., Suzuki, M. & Amano, H., 2007 Feb, In : IEICE Transactions on Information and Systems. E90-D, 2, p. 473-481 9 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)