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Fingerprint Dive into the research topics where Hiroki Matsutani is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

  • 10 Similar Profiles
Routers Engineering & Materials Science
Topology Engineering & Materials Science
Field programmable gate arrays (FPGA) Engineering & Materials Science
Throughput Engineering & Materials Science
Communication Engineering & Materials Science
Electric power utilization Engineering & Materials Science
Switches Engineering & Materials Science
Telecommunication links Engineering & Materials Science

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Research Output 2005 2019

  • 996 Citations
  • 17 h-Index
  • 100 Conference contribution
  • 26 Article
  • 1 Chapter

Accelerating blockchain transfer system using FPGA-Based NIC

Sakakibara, Y., Tokusashi, Y., Morishima, S. & Matsutani, H., 2019 Mar 20, Proceedings - 16th IEEE International Symposium on Parallel and Distributed Processing with Applications, 17th IEEE International Conference on Ubiquitous Computing and Communications, 8th IEEE International Conference on Big Data and Cloud Computing, 11th IEEE International Conference on Social Computing and Networking and 8th IEEE International Conference on Sustainable Computing and Communications, ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018. Chen, J. & Yang, L. T. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 171-178 8 p. 8672299. (Proceedings - 16th IEEE International Symposium on Parallel and Distributed Processing with Applications, 17th IEEE International Conference on Ubiquitous Computing and Communications, 8th IEEE International Conference on Big Data and Cloud Computing, 11th IEEE International Conference on Social Computing and Networking and 8th IEEE International Conference on Sustainable Computing and Communications, ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Field programmable gate arrays (FPGA)
Network protocols
Interfaces (computer)
Throughput
Processing

Accelerating online change-point detection algorithm using 10 GbE FPGA NIC

Iwata, T., Nakamura, K., Tokusashi, Y. & Matsutani, H., 2019 Jan 1, Euro-Par 2018: Parallel Processing Workshops - Euro-Par 2018 International Workshops, Revised Selected Papers. Mencagli, G. & Heras, D. B. (eds.). Springer Verlag, p. 506-517 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 11339 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Change-point Detection
Field Programmable Gate Array
Interfaces (computer)
Field programmable gate arrays (FPGA)
Ethernet

Acceleration of anomaly detection in blockchain using in-GPU Cache

Morishima, S. & Matsutani, H., 2019 Mar 20, Proceedings - 16th IEEE International Symposium on Parallel and Distributed Processing with Applications, 17th IEEE International Conference on Ubiquitous Computing and Communications, 8th IEEE International Conference on Big Data and Cloud Computing, 11th IEEE International Conference on Social Computing and Networking and 8th IEEE International Conference on Sustainable Computing and Communications, ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018. Chen, J. & Yang, L. T. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 244-251 8 p. 8672252. (Proceedings - 16th IEEE International Symposium on Parallel and Distributed Processing with Applications, 17th IEEE International Conference on Ubiquitous Computing and Communications, 8th IEEE International Conference on Big Data and Cloud Computing, 11th IEEE International Conference on Social Computing and Networking and 8th IEEE International Conference on Sustainable Computing and Communications, ISPA/IUCC/BDCloud/SocialCom/SustainCom 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Feature extraction
Processing
Program processors
Conservation
Data storage equipment

Key-value Store Chip Design for Low Power Consumption

Tokusashi, Y., Matsutani, H. & Amano, H., 2019 May 23, IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8721352. (IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL CHIPS 2019 - Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric power utilization
Bias voltage
Tuning
Application programming interfaces (API)
Embedded systems
1 Citation (Scopus)

LaKe: The power of in-network computing

Tokusashi, Y., Matsutani, H. & Zilberman, N., 2019 Feb 13, 2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018. Andrews, D., Feregrino, C., Cumplido, R. & Stroobandt, D. (eds.). Institute of Electrical and Electronics Engineers Inc., 8641696. (2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lakes
Throughput
Hardware