0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer

Abul Hasan Johari, Hiroki Ishikuro

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we have shown the design of a wideband operation On-chip Network Analyzer (OCNA) in 45nm CMOS. Its maximum operation ranges from 0.6 ∼ 3.6 GHz with maximum phase resolution of 0.3 degree, and maximum power consumption of 3.2 mW/GHz in Cadence Spectre circuit simulation. The OCNA effective area is 0.072 mm2 which is the smallest compared to previous research group. The OCNA performance is assess by monitoring the Circuit-under-Test (CUT) frequency characteristics. The proposed OCNA successfully captures the waveform and also the CUT frequency characteristic.

Original languageEnglish
Title of host publication2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
Pages539-542
Number of pages4
DOIs
Publication statusPublished - 2012 Dec 1
Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan, Province of China
Duration: 2012 Dec 22012 Dec 5

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
CountryTaiwan, Province of China
CityKaohsiung
Period12/12/212/12/5

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Johari, A. H., & Ishikuro, H. (2012). 0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 (pp. 539-542). [6419091] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2012.6419091