0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer

Abul Hasan Johari, Hiroki Ishikuro

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we have shown the design of a wideband operation On-chip Network Analyzer (OCNA) in 45nm CMOS. Its maximum operation ranges from 0.6 ∼ 3.6 GHz with maximum phase resolution of 0.3 degree, and maximum power consumption of 3.2 mW/GHz in Cadence Spectre circuit simulation. The OCNA effective area is 0.072 mm2 which is the smallest compared to previous research group. The OCNA performance is assess by monitoring the Circuit-under-Test (CUT) frequency characteristics. The proposed OCNA successfully captures the waveform and also the CUT frequency characteristic.

Original languageEnglish
Title of host publicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages539-542
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan, Province of China
Duration: 2012 Dec 22012 Dec 5

Other

Other2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
CountryTaiwan, Province of China
CityKaohsiung
Period12/12/212/12/5

Fingerprint

Electric network analyzers
Networks (circuits)
Circuit simulation
Electric power utilization
Monitoring

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Johari, A. H., & Ishikuro, H. (2012). 0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS (pp. 539-542). [6419091] https://doi.org/10.1109/APCCAS.2012.6419091

0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer. / Johari, Abul Hasan; Ishikuro, Hiroki.

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. p. 539-542 6419091.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Johari, AH & Ishikuro, H 2012, 0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer. in IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS., 6419091, pp. 539-542, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, Province of China, 12/12/2. https://doi.org/10.1109/APCCAS.2012.6419091
Johari AH, Ishikuro H. 0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer. In IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. p. 539-542. 6419091 https://doi.org/10.1109/APCCAS.2012.6419091
Johari, Abul Hasan ; Ishikuro, Hiroki. / 0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS. 2012. pp. 539-542
@inproceedings{1a2ef750a63040f2839c38e1fe301f16,
title = "0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer",
abstract = "In this paper, we have shown the design of a wideband operation On-chip Network Analyzer (OCNA) in 45nm CMOS. Its maximum operation ranges from 0.6 ∼ 3.6 GHz with maximum phase resolution of 0.3 degree, and maximum power consumption of 3.2 mW/GHz in Cadence Spectre circuit simulation. The OCNA effective area is 0.072 mm2 which is the smallest compared to previous research group. The OCNA performance is assess by monitoring the Circuit-under-Test (CUT) frequency characteristics. The proposed OCNA successfully captures the waveform and also the CUT frequency characteristic.",
author = "Johari, {Abul Hasan} and Hiroki Ishikuro",
year = "2012",
doi = "10.1109/APCCAS.2012.6419091",
language = "English",
isbn = "9781457717291",
pages = "539--542",
booktitle = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",

}

TY - GEN

T1 - 0.6-3.6 GHz wideband operation with high phase resolution on-chip network analyzer

AU - Johari, Abul Hasan

AU - Ishikuro, Hiroki

PY - 2012

Y1 - 2012

N2 - In this paper, we have shown the design of a wideband operation On-chip Network Analyzer (OCNA) in 45nm CMOS. Its maximum operation ranges from 0.6 ∼ 3.6 GHz with maximum phase resolution of 0.3 degree, and maximum power consumption of 3.2 mW/GHz in Cadence Spectre circuit simulation. The OCNA effective area is 0.072 mm2 which is the smallest compared to previous research group. The OCNA performance is assess by monitoring the Circuit-under-Test (CUT) frequency characteristics. The proposed OCNA successfully captures the waveform and also the CUT frequency characteristic.

AB - In this paper, we have shown the design of a wideband operation On-chip Network Analyzer (OCNA) in 45nm CMOS. Its maximum operation ranges from 0.6 ∼ 3.6 GHz with maximum phase resolution of 0.3 degree, and maximum power consumption of 3.2 mW/GHz in Cadence Spectre circuit simulation. The OCNA effective area is 0.072 mm2 which is the smallest compared to previous research group. The OCNA performance is assess by monitoring the Circuit-under-Test (CUT) frequency characteristics. The proposed OCNA successfully captures the waveform and also the CUT frequency characteristic.

UR - http://www.scopus.com/inward/record.url?scp=84874147729&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84874147729&partnerID=8YFLogxK

U2 - 10.1109/APCCAS.2012.6419091

DO - 10.1109/APCCAS.2012.6419091

M3 - Conference contribution

AN - SCOPUS:84874147729

SN - 9781457717291

SP - 539

EP - 542

BT - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

ER -