10nm-diameter tri-gate silicon nanowire MOSFETs with enhanced high-field transport and V th tunability through thin BOX

Masumi Saitoh, Kensuke Ota, Chika Tanaka, Ken Uchida, Toshinori Numata

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Citations (Scopus)

Abstract

We demonstrate high-performance 10nm-diameter tri-gate nanowire transistors (NW Tr.) with V th tunability, small variability and negligible self-heating. Optimized S/D and stress memorization technique (SMT) lead to significant parasitic resistance reduction and mobility enhancement. Saturation velocity increase by SMT further enhances high-field carrier velocity and I on of 1mA/μm at I off of 100nA/μm is achieved. We also demonstrate V th control in tri-gate NW Tr. with thin BOX for the first time. The degradation of body effect by NW narrowing can be recovered by thinning NW height, enabling dynamic power and performance management.

Original languageEnglish
Title of host publicationDigest of Technical Papers - Symposium on VLSI Technology
Pages11-12
Number of pages2
DOIs
Publication statusPublished - 2012
Externally publishedYes
Event2012 Symposium on VLSI Technology, VLSIT 2012 - Honolulu, HI, United States
Duration: 2012 Jun 122012 Jun 14

Other

Other2012 Symposium on VLSI Technology, VLSIT 2012
CountryUnited States
CityHonolulu, HI
Period12/6/1212/6/14

Fingerprint

Nanowires
Transistors
Silicon
Heating
Degradation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Saitoh, M., Ota, K., Tanaka, C., Uchida, K., & Numata, T. (2012). 10nm-diameter tri-gate silicon nanowire MOSFETs with enhanced high-field transport and V th tunability through thin BOX. In Digest of Technical Papers - Symposium on VLSI Technology (pp. 11-12). [6242436] https://doi.org/10.1109/VLSIT.2012.6242436

10nm-diameter tri-gate silicon nanowire MOSFETs with enhanced high-field transport and V th tunability through thin BOX. / Saitoh, Masumi; Ota, Kensuke; Tanaka, Chika; Uchida, Ken; Numata, Toshinori.

Digest of Technical Papers - Symposium on VLSI Technology. 2012. p. 11-12 6242436.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Saitoh, M, Ota, K, Tanaka, C, Uchida, K & Numata, T 2012, 10nm-diameter tri-gate silicon nanowire MOSFETs with enhanced high-field transport and V th tunability through thin BOX. in Digest of Technical Papers - Symposium on VLSI Technology., 6242436, pp. 11-12, 2012 Symposium on VLSI Technology, VLSIT 2012, Honolulu, HI, United States, 12/6/12. https://doi.org/10.1109/VLSIT.2012.6242436
Saitoh M, Ota K, Tanaka C, Uchida K, Numata T. 10nm-diameter tri-gate silicon nanowire MOSFETs with enhanced high-field transport and V th tunability through thin BOX. In Digest of Technical Papers - Symposium on VLSI Technology. 2012. p. 11-12. 6242436 https://doi.org/10.1109/VLSIT.2012.6242436
Saitoh, Masumi ; Ota, Kensuke ; Tanaka, Chika ; Uchida, Ken ; Numata, Toshinori. / 10nm-diameter tri-gate silicon nanowire MOSFETs with enhanced high-field transport and V th tunability through thin BOX. Digest of Technical Papers - Symposium on VLSI Technology. 2012. pp. 11-12
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