18-GHz clock distribution using a coupled VCO array

Takayuki Shibasaki, Hirotaka Tamura, Kouichi Kanda, Hisakatsu Yamaguchi, Junji Ogawa, Tadahiro Kuroda

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

This paper describes an 18-GHz coupled VCO array for low jitter and low phase deviation clock distribution. To reduce the skew, jitter and power consumption associated with clock distribution, the clock is generated by a one-dimensional VCO array in which the oscillating nodes of adjacent VCOs are directly connected with wires. The effects of the wire length and number of unit VCOs in the array are discussed. Both 4-unit and a 2-unit VCO arrays for delivering a clock signal to a 16:1 multiplexor were designed and fabricated in a 90-nm CMOS process. The frequency range of the 4-unit VCO array was 16 GHz to 18.5 GHz while each unit VCO consumed 2 mA.

Original languageEnglish
Pages (from-to)811-822
Number of pages12
JournalIEICE Transactions on Electronics
VolumeE90-C
Issue number4
DOIs
Publication statusPublished - 2007 Apr

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Keywords

  • Clock distribution
  • High-speed I/O
  • Injection locking
  • Oscillators
  • Voltage-controlled oscillator

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Shibasaki, T., Tamura, H., Kanda, K., Yamaguchi, H., Ogawa, J., & Kuroda, T. (2007). 18-GHz clock distribution using a coupled VCO array. IEICE Transactions on Electronics, E90-C(4), 811-822. https://doi.org/10.1093/ietele/e90-c.4.811