50% Active-power saving without speed degradation using standby power reduction (spr) circuit

Katsuhiro Seta; Hiroyuki Hara; Tadahiro Kuroda; Masakazu Kakumu; Takayasu Sakurai

doi:10.1109/9780470545058.sect3

50% Active-power saving without speed degradation using standby power reduction (spr) circuit

Katsuhiro Seta, Hiroyuki Hara, Tadahiro Kuroda, Masakazu Kakumu, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceeding › Chapter

Original language	English
Title of host publication	Low-Power CMOS Design
Publisher	John Wiley and Sons Inc.
Pages	95-96
Number of pages	2
ISBN (Electronic)	9780470545058
ISBN (Print)	9780780334298
DOIs	https://doi.org/10.1109/9780470545058.sect3
Publication status	Published - 1998 Jan 1
Externally published	Yes

ASJC Scopus subject areas

Engineering(all)
Computer Science(all)
Energy(all)

Access to Document

10.1109/9780470545058.sect3

Cite this

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title = "50% Active-power saving without speed degradation using standby power reduction (spr) circuit",

author = "Katsuhiro Seta and Hiroyuki Hara and Tadahiro Kuroda and Masakazu Kakumu and Takayasu Sakurai",

year = "1998",

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T1 - 50% Active-power saving without speed degradation using standby power reduction (spr) circuit

AU - Seta, Katsuhiro

AU - Hara, Hiroyuki

AU - Kuroda, Tadahiro

AU - Kakumu, Masakazu

AU - Sakurai, Takayasu

PY - 1998/1/1

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SN - 9780780334298

SP - 95

EP - 96

BT - Low-Power CMOS Design

PB - John Wiley and Sons Inc.

ER -

50% Active-power saving without speed degradation using standby power reduction (spr) circuit

ASJC Scopus subject areas

Access to Document

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