5Gb/s 8 × 8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200MHz LVDS interface

Yasuo Unekawa, Keiko Seki-Fukuda, Kenji Sakaue, Takehiko Nakao, Shin'ichi Yoshioka, Tetsu Nagamatsu, Hideaki Nakakita, Yasuyuki Kaneko, Masahiko Motoyama, Yoshihiro Ohba, Koutarou Ise, Masayoshi Ono, Kuniyuki Fujiwara, Yuichi Miyazawa, Tadahiro Kuroda, al et al

Research output: Contribution to journalConference article

Abstract

The switch element (SE) is a 622Mb/s, 8×8 shared-buffer ATM switch LSI for backbone LAN and WAN applications. The SE has 5Gbps bandwidth, supporting 5 QoS classes delay priority and link-by-link multicast. Up to a 32×32 switch with 20Gbps bandwidth can be configured using multiple SEs and distributor/arbiter LSIs.

Original languageEnglish
Pages (from-to)118-119
Number of pages2
JournalDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume39
Publication statusPublished - 1996 Feb 1
EventProceedings of the 1996 IEEE International Solid-State Circuits Conference - San Francisco, CA, USA
Duration: 1996 Feb 81996 Feb 10

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Unekawa, Y., Seki-Fukuda, K., Sakaue, K., Nakao, T., Yoshioka, S., Nagamatsu, T., Nakakita, H., Kaneko, Y., Motoyama, M., Ohba, Y., Ise, K., Ono, M., Fujiwara, K., Miyazawa, Y., Kuroda, T., & et al, A. (1996). 5Gb/s 8 × 8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200MHz LVDS interface. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 39, 118-119.