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A(touch)ment: A smartphone extension for instantly sharing visual and tactile experience
Nakamura, H., Hanamitsu, N. & Minamizawa, K., 2015 Mar 9, Proceedings of the 6th Augmented Human International Conference, AH 2015. Association for Computing Machinery, p. 223-224 2 p. (ACM International Conference Proceeding Series; vol. 11).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
7 Citations (Scopus) -
A 0.0058mm2 7.0 ENOB 24MS/s 17fJ/conv. threshold configuring SAR ADC with source voltage shifting and interpolation technique
Yoshioka, K., Shikata, A., Sekimoto, R., Kuroda, T. & Ishikuro, H., 2013 Sep 17, 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers. p. C266-C267 6578689. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
12 Citations (Scopus) -
A 0.025-0.45 W 60%-efficiency inductive-coupling power transceiver with 5-bit dual-frequency feedforward control for non-contact memory cards
Chung, H., Radecki, A., Miura, N., Ishikuro, H. & Kuroda, T., 2012, In: IEEE Journal of Solid-State Circuits. 47, 10, p. 2496-2504 9 p., 6293915.Research output: Contribution to journal › Article › peer-review
13 Citations (Scopus) -
A 0.11μm CMOS clocked comparator for high-speed serial communications
Okaniwa, Y., Tamura, H., Kibune, M., Yamazaki, D., Cheung, T. S., Ogawa, J., Tzartzanis, N., Walker, W. W. & Kuroda, T., 2004 Sep 29, p. 198-201. 4 p.Research output: Contribution to conference › Paper › peer-review
11 Citations (Scopus) -
A 0.12V fully integrated charge pump with gate voltage optimization for energy harvesting applications
Tan, Y., Shiiki, Y. & Ishikuro, H., 2020, 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 9180420. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 2020-October).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
A 0.14pJ/b inductive-coupling inter-chip data transceiver with digitally-controlled precise pulse shaping
Miura, N., Ishikuro, H., Sakurai, T. & Kuroda, T., 2007, 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 358-360 3 p. 4242413. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
89 Citations (Scopus) -
A 0.14 pJ/b Inductive-Coupling Transceiver With Digitally-Controlled Precise Pulse Shaping
Miura, N., Ishikuro, H., Niitsu, K., Sakurai, T. & Kuroda, T., 2008 Jan, In: IEEE Journal of Solid-State Circuits. 43, 1, p. 285-291 7 p.Research output: Contribution to journal › Article › peer-review
25 Citations (Scopus) -
A 0.15-mm-thick noncontact connector for mipi using a vertical directional coupler
Kosuge, A., Mizuhara, W., Shidei, T., Takeya, T., Miura, N., Taguchi, M., Ishikuro, H. & Kuroda, T., 2014 Jan, In: IEEE Journal of Solid-State Circuits. 49, 1, p. 223-231 9 p., 6616659.Research output: Contribution to journal › Article › peer-review
6 Citations (Scopus) -
A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler
Mizuhara, W., Shidei, T., Kosuge, A., Takeya, T., Miura, N., Taguchi, M., Ishikuro, H. & Kuroda, T., 2013 Apr 29, 2013 IEEE International Solid-State Circuits Conference, ISSCC 2013 - Digest of Technical Papers. p. 200-201 2 p. 6487699. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 56).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
7 Citations (Scopus) -
A 0.35-0.8V 8b 0.5-35MS/s 2bit/step extremely-low power SAR ADC
Yoshioka, K., Shikata, A., Sekimoto, R., Kuroda, T. & Ishikuro, H., 2013 May 20, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 111-112 2 p. 6509581. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
A 0.45V-to-2.7V inductive-coupling level shifter
Takatsu, K., Niitsu, K., Shidei, T., Miura, N. & Kuroda, T., 2010 Dec 1, 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010. p. 205-208 4 p. 5716591. (2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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A 0.55 V 10 fJ/bit inductive-coupling data link and 0.7 V 135 fJ/cycle clock link with dual-coil transmission scheme
Miura, N., Shidei, T., Yuan, Y., Kawai, S., Takatsu, K., Kiyota, Y., Asano, Y. & Kuroda, T., 2011 Apr, In: IEEE Journal of Solid-State Circuits. 46, 4, p. 965-973 9 p., 5720524.Research output: Contribution to journal › Article › peer-review
20 Citations (Scopus) -
A 0.5V 1.1MS/sec 6.3fJ/conversion-step SAR-ADC with tri-level comparator in 40nm CMOS
Shikata, A., Sekimoto, R., Kuroda, T. & Ishikuro, H., 2011 Sep 16, 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers. p. 262-263 2 p. 5986444. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
39 Citations (Scopus) -
A 0.5 v 1.1 MS/sec 6.3 fJ/conversion-step SAR-ADC with tri-level comparator in 40 nm CMOS
Shikata, A., Sekimoto, R., Kuroda, T. & Ishikuro, H., 2012 Apr, In: IEEE Journal of Solid-State Circuits. 47, 4, p. 1022-1030 9 p., 6165388.Research output: Contribution to journal › Article › peer-review
90 Citations (Scopus) -
A 0.5V 10MHz-to-100MHz 0.47μz power scalable AD-PLL in 40nm CMOS
Hiraku, Y., Hayashi, I., Chung, H., Kuroda, T. & Ishikuro, H., 2012 Dec 1, p. 33-36. 4 p.Research output: Contribution to conference › Paper › peer-review
10 Citations (Scopus) -
A 0.5-v 5.2-fj/conversion-step full asynchronous sar adc with leakage power reduction down to 650 pw by boosted self-power gating in 40-nm CMOS
Sekimoto, R., Shikata, A., Yoshioka, K., Kuroda, T. & Ishikuro, H., 2013, In: IEEE Journal of Solid-State Circuits. 48, 11, p. 2628-2636 9 p., 6578607.Research output: Contribution to journal › Article › peer-review
28 Citations (Scopus) -
A 0.5V 65nm-CMOS single phase clocked bootstrapped switch with rise time accelerator
Shikata, A., Sekimoto, R. & Ishikuro, H., 2010 Dec 1, Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010. p. 1015-1018 4 p. 5774976. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
10 Citations (Scopus) -
A 0.5V 6-bit scalable phase interpolator
Kumaki, S., Johari, A. H., Matsubara, T., Hayashi, I. & Ishikuro, H., 2010 Dec 1, Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010. p. 1019-1022 4 p. 5775034. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
21 Citations (Scopus) -
A 0.6V noise rejectable all-digital CDR with free running TDC for a pulse-based inductive-coupling interface
Yun, W. J., Ishikuro, H. & Kuroda, T., 2011 Dec 1, 2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011. p. 145-148 4 p. 6123623. (2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
4 Citations (Scopus) -
A 0.79mm2 29mW real-time face detection core
Hori, Y., Kusaka, M. & Kuroda, T., 2006 Dec 1, 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 150-151 2 p. 1705354. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2 Citations (Scopus) -
A 0.79-mm2 29-mW real-time face detection core
Hori, Y. & Kuroda, T., 2007 Apr, In: IEEE Journal of Solid-State Circuits. 42, 4, p. 790-797 8 p.Research output: Contribution to journal › Article › peer-review
21 Citations (Scopus) -
A 0.7V 12b 160MS/s 12.8fJ/conv-step pipelined-SAR ADC in 28nm CMOS with digital amplifier technique
Yoshioka, K., Sugimoto, T., Waki, N., Kim, S., Kurose, D., Ishii, H., Furuta, M., Sai, A. & Itakura, T., 2017 Mar 2, 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017. Fujino, L. C. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 478-479 2 p. 7870469. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 60).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
26 Citations (Scopus) -
A 0.7V 20fJ/bit inductive-coupling data link with dual-coil transmission scheme
Miura, N., Shidei, T., Yuxiang, Y., Kawai, S., Takatsu, K., Kiyota, Y., Asano, Y. & Kuroda, T., 2010 Oct 22, 2010 Symposium on VLSI Circuits, VLSIC 2010. p. 201-202 2 p. 5560299. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
9 Citations (Scopus) -
A 0.7V 4.1mW 850Mbps/ch inductive-coupling transceiver with adaptive pulse width controller in 65nm CMOS
Matsubara, T., Hayashi, I., Johari, A. H., Kuroda, T. & Ishikuro, H., 2012 May 11, RWW 2012 - Proceedings: IEEE Radio and Wireless Symposium, RWS 2012. p. 71-74 4 p. 6175333. (RWW 2012 - Proceedings: IEEE Radio and Wireless Symposium, RWS 2012).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
4 Citations (Scopus) -
A 0.7V intermittently operating LNA with optimal on-time controller for pulse-based inductive-coupling transceiver
Jyo, T., Kuroda, T. & Ishikuro, H., 2013 Sep 9, Proceedings of the 2013 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2013. p. 21-24 4 p. 6569511. (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
A 0.8V 1.1pJ/bit inductive-coupling receiver with pulse extracting clock recovery circuit and intermittently operating LNA
Jyo, T., Kuroda, T. & Ishikuro, H., 2013 May 1, RSW 2013 - 2013 IEEE Radio and Wireless Symposium - RWW 2013. p. 217-219 3 p. 6486693. (IEEE Radio and Wireless Symposium, RWS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
3 Citations (Scopus) -
A 0.8-μm BiCMOS sea-of-gates implementation of the tandem banyan fast packet switch
Chiussi, F. M., Amano, H. & Tobagi, F. A., 1991 Dec 1, Proceedings of the Custom Integrated Circuits Conference. Publ by IEEE, (Proceedings of the Custom Integrated Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2 Citations (Scopus) -
A 0.9-V, 150-MHz, 10-mW, 4 mm", 2-D discrete cosine transform core processor with variable threshold-voltage (VT) scheme
Kuroda, T., Fujita, T., Mita, S., Nagamatsu, T., Yoshioka, S., Suzuki, K., Sano, F., Norishima, M., Murota, M., Kako, M., Kinugawa, M., Kakumu, M. & Sakurai, T., 1996 Nov, In: IEEE Journal of Solid-State Circuits. 31, 11, p. 1770-1777 8 p.Research output: Contribution to journal › Article › peer-review
315 Citations (Scopus) -
A 0.9-V, 150-MHz, 10-mW, 4 mm2, 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme
Kuroda, T., Fujita, T., Mita, S., Nagamatsu, T., Yoshioka, S., Suzuki, K., Sano, F., Norishima, M., Murota, M., Kako, M., Kinugawa, M., Kakumu, M. & Sakurai, T., 1998 Jan 1, Low-Power CMOS Design. John Wiley and Sons Inc., p. 97-104 8 p.Research output: Chapter in Book/Report/Conference proceeding › Chapter
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A 1.26mW/Gbps 8 locking cycles versatile all-digital CDR with TDC combined DLL
Urano, Y., Yun, W. J., Kuroda, T. & Ishikuro, H., 2013 Sep 9, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. p. 1576-1579 4 p. 6572161. (Proceedings - IEEE International Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
9 Citations (Scopus) -
A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)
Mizoguchi, D., Yusof, Y. B., Miura, N., Sakurai, T. & Kuroda, T., 2003 Dec 1, In: Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 47, p. 104-105 2 p.Research output: Contribution to journal › Conference article › peer-review
4 Citations (Scopus) -
A 1.2Gb/s/pin wireless superconnect based on Inductive Inter-chip Signaling (IIS)
Mizoguchi, D., Yusof, Y. B., Miura, N., Sakurai, T. & Kuroda, T., 2004 Jun 2, In: Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 47, p. 142-143+131+517Research output: Contribution to journal › Conference article › peer-review
82 Citations (Scopus) -
A 1.2 Gbps non-contact 3D-stacked inter-chip data communications technology
Mizoguchi, D., Miura, N., Sakurai, T. & Kuroda, T., 2006 Jan 1, In: IEICE Transactions on Electronics. E89-C, 3, p. 320-326 7 p.Research output: Contribution to journal › Article › peer-review
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A 1.2-V CMOS complex bandpass filter with a tunable center frequency
Majima, H., Ishikuro, H., Agawa, K. & Hamada, M., 2005 Dec 1, Proceedings of ESSCIRC 2005: 31st European Solid-State Circuits Conference. p. 327-330 4 p. 1541626. (Proceedings of ESSCIRC 2005: 31st European Solid-State Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
14 Citations (Scopus) -
A 1.5 Gbit/s GaAs Four-Channel Selector LSI with Monolithically Integrated Newly Structured GaAs Ohmic Contact MSM Photodetector and Laser Driver
Yamanaka, N. & Takada, T., 1989 Oct, In: IEEE Photonics Technology Letters. 1, 10, p. 310-312 3 p.Research output: Contribution to journal › Article › peer-review
6 Citations (Scopus) -
A 1.6 GS/s 3.17 mW 6-b passive pipelined binary-search ADC with memory effect canceller and reference voltage calibration
Tanaka, K., Saito, R. & Ishikuro, H., 2015 Oct 30, ESSCIRC 2015 - Proceedings of the 41st European Solid-State Circuits Conference. Dielacher, F., Pribyl, W. & Hueber, G. (eds.). IEEE Computer Society, p. 327-330 4 p. 7313893. (European Solid-State Circuits Conference; vol. 2015-October).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
4 Citations (Scopus) -
A 1.8-Gb/s GaAs Optoelectronic Universal Switch LSI with Monolithically Integrated Photodetector and Laser Driver
Yamanaka, N., Kikuchi, S. & Takada, T., 1992 Aug, In: Journal of Lightwave Technology. 10, 8, p. 1162-1166 5 p.Research output: Contribution to journal › Article › peer-review
3 Citations (Scopus) -
A 100-Gb/s throughput ATM switch MCM with a 320-channel parallel optical I/O interface
Kawano, R., Yamanaka, N., Oki, E., Yasukawa, S., Okazaki, K., Ohki, A., Usui, M., Sato, N., Katsura, K., Ando, Y., Kagawa, T. & Hikita, M., 2001 Feb, In: IEEE Transactions on Advanced Packaging. 24, 1, p. 91-98 8 p.Research output: Contribution to journal › Article › peer-review
2 Citations (Scopus) -
A 100-Gb-Ethernet subsystem for next-generation metro-area network
Toyoda, H., Nishimura, S., Okuno, M., Yamaoka, R. & Nishi, H., 2005 Sep 15, In: IEEE International Conference on Communications. 2, p. 1036-1042 7 p.Research output: Contribution to journal › Conference article › peer-review
4 Citations (Scopus) -
A 100Mb/s 13.7pJ/bit DC-960MHz band plesiochronous IR-UWB receiver with Costas-loop based synchronization scheme in 65nm CMOS
Liu, L., Ishikuro, H. & Kuroda, T., 2012 Nov 26, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012. 6330586. (Proceedings of the Custom Integrated Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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A 107pJ/b 100kb/s 0.18μm capacitive-coupling transceiver for printable communication sheel
Liu, L., Takamiya, M., Sekitani, T., Noguchi, Y., Nakano, S., Zaitsu, K., Kuroda, T., Someya, T. & Sakurai, T., 2008, 2008 IEEE International Solid State Circuits Conference - Digest of Technical Papers, ISSCC. Institute of Electrical and Electronics Engineers Inc., p. 291-293 3 p. 4523172. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 51).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
13 Citations (Scopus) -
A 107-pJ/bit 100-kb/s 0.18-μm capacitive-coupling transceiver with data edge signaling and DC power-free pulse detector for printable communication sheet
Liu, L., Takamiya, M., Sekitani, T., Noguchi, Y., Nakano, S., Zaitsu, K., Kuroda, T., Someya, T. & Sakurai, T., 2009, In: IEEE Transactions on Circuits and Systems I: Regular Papers. 56, 11, p. 2511-2518 8 p., 4785181.Research output: Contribution to journal › Article › peer-review
3 Citations (Scopus) -
A 10-bit 80-MS/s decision-select successive approximation TDC in 65-nm CMOS
Chung, H., Ishikuro, H. & Kuroda, T., 2012 May, In: IEEE Journal of Solid-State Circuits. 47, 5, p. 1232-1241 10 p., 6151852.Research output: Contribution to journal › Article › peer-review
52 Citations (Scopus) -
A 10 Gb/s firewall system for network security in photonic era
Katayama, M., Kai, H., Yoshida, J., Inami, M., Yamada, H., Shiomoto, K. & Yamanaka, N., 2005, In: IEICE Transactions on Communications. E88-B, 5, p. 1914-1919 6 p.Research output: Contribution to journal › Article › peer-review
5 Citations (Scopus) -
A 10Gb/s receiver with equalizer and on-chip ISI monitor in 0.11μm CMOS
Tomita, Y., Kibune, M., Ogawa, J., Walker, W. W., Tamura, H. & Kuroda, T., 2004 Sep 29, p. 202-205. 4 p.Research output: Contribution to conference › Paper › peer-review
23 Citations (Scopus) -
A 10-Gb/s receiver with series equalizer and on-chip ISI monitor in 0.11-μm CMOS
Tomita, Y., Kibune, M., Ogawa, J., Walker, W. W., Tamura, H. & Kuroda, T., 2005 Apr, In: IEEE Journal of Solid-State Circuits. 40, 4, p. 986-993 8 p.Research output: Contribution to journal › Article › peer-review
52 Citations (Scopus) -
A 10Gb/s wire-speed firewall system using reconfigurable processors
Katayama, M., Kai, H., Yoshida, J., Yamada, H., Shiomoto, K. & Yamanaka, N., 2005, In: IEEE International Conference on Communications. 1, p. 300-305 6 p.Research output: Contribution to journal › Conference article › peer-review
1 Citation (Scopus) -
A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications
Toyama, Y., Yoshioka, K., Ban, K., Sai, A. & Onizuka, K., 2018 Dec 14, 2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p. 8579253. (2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2 Citations (Scopus) -
A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers
Kosuge, A., Mizuhara, W., Miura, N., Taguchi, M., Ishikuro, H. & Kuroda, T., 2012 Nov 26, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012. 6330611. (Proceedings of the Custom Integrated Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
7 Citations (Scopus) -
A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers
Kosuge, A., Mizuhara, W., Miura, N., Taguchi, M., Ishikuro, H. & Kuroda, T., 2013 May 20, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 91-92 2 p. 6509571. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus)