A 0.79-mm2 29-mW real-time face detection core is fabricated in a 0.13-μm CMOS technology. It consists of 75-kgate logic, 58-kbit SRAM, and an ARM AMBA bus interface. Comprehensive optimization in both algorithm and hardware design improves performance and reduces area and power dissipation. Two kinds of templates with facial features are proposed to achieve high speed and yet accurate face detection. A Steady State Genetic Algorithm is employed for high-speed hardware implementation of template matching. To reduce area and power dissipation, frame memory is optimized at minimum and the detection engine is shared for two kinds of template matching. The core can detect eight faces in each frame of moving pictures at 30 frames/second. Face detection accuracy is 92%.
- Face recognition
- Genetic algorithms
- Low power
ASJC Scopus subject areas
- Electrical and Electronic Engineering