A 0.8-μm BiCMOS sea-of-gates implementation of the tandem banyan fast packet switch

Fabio M. Chiussi, Hideharu Amano, Fouad A. Tobagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A simple, high-performance architecture for fast packet switching, called the Tandem Banyan Switching Fabric, has been proposed. The authors report on the implementation of the routing functionality of this architecture, augmented with self-testing and fault-recovery capabilities, using a high-performance BiCMOS sea-of-gates on a 0.8-μm technology.

Original languageEnglish
Title of host publicationProceedings of the Custom Integrated Circuits Conference
PublisherPubl by IEEE
ISBN (Print)0780300157
Publication statusPublished - 1991
Externally publishedYes
EventProceedings of the IEEE 1991 Custom Integrated Circuits Conference - San Diego, CA, USA
Duration: 1991 May 121991 May 15

Other

OtherProceedings of the IEEE 1991 Custom Integrated Circuits Conference
CitySan Diego, CA, USA
Period91/5/1291/5/15

    Fingerprint

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Chiussi, F. M., Amano, H., & Tobagi, F. A. (1991). A 0.8-μm BiCMOS sea-of-gates implementation of the tandem banyan fast packet switch. In Proceedings of the Custom Integrated Circuits Conference Publ by IEEE.