A 1 Tb/s/mm2 inductive-coupling side-by-side chip link

So Hasegawa; Junichiro Kadomoto; Atsutake Kosuge; Tadahiro Kuroda

doi:10.1109/ESSCIRC.2016.7598343

A 1 Tb/s/mm² inductive-coupling side-by-side chip link

So Hasegawa, Junichiro Kadomoto, Atsutake Kosuge, Tadahiro Kuroda

Department of Electronics and Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

An inductive coupling technique for wireless interconnection of side-by-side chips within a package is presented. Data is transferred by using changes in magnetic field that occur when the current in coils on the chips is switched off. The circuit layout area and power consumption of transceivers have respectively been reduced to 1/3 and 1/6. A world-leading transmission rate of 1 Tb/s/mm², which is faster by a factor of 3, has been achieved with a 0.18 μm CMOS test chip.

Original language	English
Title of host publication	ESSCIRC 2016: 42nd European Solid-State Circuits Conference
Publisher	IEEE Computer Society
Pages	469-472
Number of pages	4
Volume	2016-October
ISBN (Electronic)	9781509029723
DOIs	https://doi.org/10.1109/ESSCIRC.2016.7598343
Publication status	Published - 2016 Oct 18
Event	42nd European Solid-State Circuits Conference, ESSCIRC 2016 - Lausanne, Switzerland Duration: 2016 Sep 12 → 2016 Sep 15

Other

Other	42nd European Solid-State Circuits Conference, ESSCIRC 2016
Country	Switzerland
City	Lausanne
Period	16/9/12 → 16/9/15

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Keywords

inductive coupling
system in a package

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Cite this

Hasegawa, S., Kadomoto, J., Kosuge, A., & Kuroda, T. (2016). A 1 Tb/s/mm² inductive-coupling side-by-side chip link. In ESSCIRC 2016: 42nd European Solid-State Circuits Conference (Vol. 2016-October, pp. 469-472). [7598343] IEEE Computer Society. https://doi.org/10.1109/ESSCIRC.2016.7598343

Hasegawa, S, Kadomoto, J, Kosuge, A & Kuroda, T 2016, A 1 Tb/s/mm² inductive-coupling side-by-side chip link. in ESSCIRC 2016: 42nd European Solid-State Circuits Conference. vol. 2016-October, 7598343, IEEE Computer Society, pp. 469-472, 42nd European Solid-State Circuits Conference, ESSCIRC 2016, Lausanne, Switzerland, 16/9/12. https://doi.org/10.1109/ESSCIRC.2016.7598343

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Access to Document

10.1109/ESSCIRC.2016.7598343