A 1-V 299μW flashing UWB transceiver based on double thresholding scheme

Atit Tamtrakarn, Hiroki Ishikuro, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

27 Citations (Scopus)

Abstract

This paper presents an Ultra-Wide-Band transceiver based on a newly proposed double thresholding scheme. The scheme does not require any precise synchronization and thus is practical in ad-hoc networks. The proposed architecture has high noise and multi-path fading signal immunities. All analog blocks are activated in a short period called 'flashing' to suppress total average power. A tested chip is manufactured using 0.15μm FD-SOI CMOS technology. The measured average power is 299μ.W at 25kbps data-rate over the distance of 35cm.

Original languageEnglish
Title of host publication2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages202-203
Number of pages2
Publication statusPublished - 2006 Dec 1
Externally publishedYes
Event2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States
Duration: 2006 Jun 152006 Jun 17

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other2006 Symposium on VLSI Circuits, VLSIC
CountryUnited States
CityHonolulu, HI
Period06/6/1506/6/17

Keywords

  • Double thresholding
  • Flashing
  • Low-power
  • UWB

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • Cite this

    Tamtrakarn, A., Ishikuro, H., Ishida, K., Takamiya, M., & Sakurai, T. (2006). A 1-V 299μW flashing UWB transceiver based on double thresholding scheme. In 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers (pp. 202-203). [1705380] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).