A 2 Gb/s expandable space-division switching LSI and network architecture for gigabit-rate broad-band circuit switching

Naoaki Yamanaka, Shiro Kikuchi, Masao Suzuki, Yukiharu Yoshioka

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

An expandable space-division (SD) switch architecture and a bipolar circuit design for gigabit-per-second crosspoint-switch LSIs are described. An expandable 2-Gb/s 16 × 16 crosspoint switch LSI which employs a novel switch structure, a novel circuit design, and a super self-aligned process (SST-1A) is developed. A switching module and partial 1:n nonblock, full 1:1 nonblock switching network architecture are also presented. Using the LSI and the switching network architecture, an experimental 620-Mb/s network system is demonstrated.

Original languageEnglish
Pages (from-to)1543-1550
Number of pages8
JournalIEEE Journal on Selected Areas in Communications
Volume8
Issue number8
DOIs
Publication statusPublished - 1990 Oct
Externally publishedYes

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Switching circuits
Network architecture
Switches
Switching networks
Networks (circuits)

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

Cite this

A 2 Gb/s expandable space-division switching LSI and network architecture for gigabit-rate broad-band circuit switching. / Yamanaka, Naoaki; Kikuchi, Shiro; Suzuki, Masao; Yoshioka, Yukiharu.

In: IEEE Journal on Selected Areas in Communications, Vol. 8, No. 8, 10.1990, p. 1543-1550.

Research output: Contribution to journalArticle

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