A 352Gb/s inductive-coupling DRAM/SoC interface using overlapping coils with phase division multiplexing and ultra-thin fan-out wafer level package

Abdul Raziz Junaidi, Yasuhiro Take, Tadahiro Kuroda

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    8 Citations (Scopus)

    Abstract

    The area efficiency of an inductive-coupling interface is improved by 12 times for WIO2 standard (352Gb/s) and beyond. By using a quadrature phase division multiplexing, coils are overlapped and the density is increased by 4 times. It is further increased by 3 times by shortening communication distance with an ultra-thin fan-out wafer level package. The proposed DRAM/SoC interface at 356Gb/s outperforms WIO2 with TSV in terms of area efficiency (4x better) and manufacturing cost (40% cheaper) and outperforms LPDDR4 in PoP in terms of power dissipation (5x lower) and timing control easiness.

    Original languageEnglish
    Title of host publication2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    ISBN (Print)9781479933273
    DOIs
    Publication statusPublished - 2014 Jan 1
    Event28th IEEE Symposium on VLSI Circuits, VLSIC 2014 - Honolulu, HI, United States
    Duration: 2014 Jun 102014 Jun 13

    Publication series

    NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

    Other

    Other28th IEEE Symposium on VLSI Circuits, VLSIC 2014
    CountryUnited States
    CityHonolulu, HI
    Period14/6/1014/6/13

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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  • Cite this

    Junaidi, A. R., Take, Y., & Kuroda, T. (2014). A 352Gb/s inductive-coupling DRAM/SoC interface using overlapping coils with phase division multiplexing and ultra-thin fan-out wafer level package. In 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers [6858369] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIC.2014.6858369