A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%

Atsutake Kosuge, Shu Ishizuka, Marni Abe, Satoshi Ichikawa, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Processor systems that are mounted in satellites must be small and light, having high data transfer rates, and high storage capacity [1]. A small reduction in size and weight could reduce the cost of launching a satellite by a significant amount. The next generation of earth observation satellites will require data transmission rates to a maximum of 20Gb/s and at least one terabyte of storage capacity. The volume, weight, and communication speed of the processor system is determined by the backplane connectors (Fig. 20.4.1). It is difficult to achieve a connector that can pass signals of 2.5Gb/s or more. The signal reflection that occurs when signals are branched at connectors and at the wire stubs of branches decreases the transmission speed, so only point-to-point connections are possible. Once the satellite is launched, repair or replacement is not possible, and system redundancy is introduced. Accordingly, 512 backplane wires would be required. The signal connector would require 1,024pins, including the ground pins used to prevent crosstalk, and would be 512mm wide, which is even wider than the circuit board of each module.

Original languageEnglish
Title of host publicationDigest of Technical Papers - IEEE International Solid-State Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages434-435
Number of pages2
Volume58
ISBN (Print)9781479962235
DOIs
Publication statusPublished - 2015 Mar 17
Event2015 62nd IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers - San Francisco, United States
Duration: 2015 Feb 222015 Feb 26

Other

Other2015 62nd IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers
CountryUnited States
CitySan Francisco
Period15/2/2215/2/26

Fingerprint

Satellites
Wire
Data transfer rates
Launching
Crosstalk
Data communication systems
Redundancy
Repair
Earth (planet)
Networks (circuits)
Communication
Costs

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Kosuge, A., Ishizuka, S., Abe, M., Ichikawa, S., & Kuroda, T. (2015). A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference (Vol. 58, pp. 434-435). [7063112] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2015.7063112

A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%. / Kosuge, Atsutake; Ishizuka, Shu; Abe, Marni; Ichikawa, Satoshi; Kuroda, Tadahiro.

Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 58 Institute of Electrical and Electronics Engineers Inc., 2015. p. 434-435 7063112.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kosuge, A, Ishizuka, S, Abe, M, Ichikawa, S & Kuroda, T 2015, A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%. in Digest of Technical Papers - IEEE International Solid-State Circuits Conference. vol. 58, 7063112, Institute of Electrical and Electronics Engineers Inc., pp. 434-435, 2015 62nd IEEE International Solid-State Circuits Conference, ISSCC 2015 - Digest of Technical Papers, San Francisco, United States, 15/2/22. https://doi.org/10.1109/ISSCC.2015.7063112
Kosuge A, Ishizuka S, Abe M, Ichikawa S, Kuroda T. A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 58. Institute of Electrical and Electronics Engineers Inc. 2015. p. 434-435. 7063112 https://doi.org/10.1109/ISSCC.2015.7063112
Kosuge, Atsutake ; Ishizuka, Shu ; Abe, Marni ; Ichikawa, Satoshi ; Kuroda, Tadahiro. / A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%. Digest of Technical Papers - IEEE International Solid-State Circuits Conference. Vol. 58 Institute of Electrical and Electronics Engineers Inc., 2015. pp. 434-435
@inproceedings{8b68a42e00a24b12bf59ca3779f2176b,
title = "A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60{\%}",
abstract = "Processor systems that are mounted in satellites must be small and light, having high data transfer rates, and high storage capacity [1]. A small reduction in size and weight could reduce the cost of launching a satellite by a significant amount. The next generation of earth observation satellites will require data transmission rates to a maximum of 20Gb/s and at least one terabyte of storage capacity. The volume, weight, and communication speed of the processor system is determined by the backplane connectors (Fig. 20.4.1). It is difficult to achieve a connector that can pass signals of 2.5Gb/s or more. The signal reflection that occurs when signals are branched at connectors and at the wire stubs of branches decreases the transmission speed, so only point-to-point connections are possible. Once the satellite is launched, repair or replacement is not possible, and system redundancy is introduced. Accordingly, 512 backplane wires would be required. The signal connector would require 1,024pins, including the ground pins used to prevent crosstalk, and would be 512mm wide, which is even wider than the circuit board of each module.",
author = "Atsutake Kosuge and Shu Ishizuka and Marni Abe and Satoshi Ichikawa and Tadahiro Kuroda",
year = "2015",
month = "3",
day = "17",
doi = "10.1109/ISSCC.2015.7063112",
language = "English",
isbn = "9781479962235",
volume = "58",
pages = "434--435",
booktitle = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - A 6.5Gb/s Shared bus using electromagnetic connectors for downsizing and lightening satellite processor system by 60%

AU - Kosuge, Atsutake

AU - Ishizuka, Shu

AU - Abe, Marni

AU - Ichikawa, Satoshi

AU - Kuroda, Tadahiro

PY - 2015/3/17

Y1 - 2015/3/17

N2 - Processor systems that are mounted in satellites must be small and light, having high data transfer rates, and high storage capacity [1]. A small reduction in size and weight could reduce the cost of launching a satellite by a significant amount. The next generation of earth observation satellites will require data transmission rates to a maximum of 20Gb/s and at least one terabyte of storage capacity. The volume, weight, and communication speed of the processor system is determined by the backplane connectors (Fig. 20.4.1). It is difficult to achieve a connector that can pass signals of 2.5Gb/s or more. The signal reflection that occurs when signals are branched at connectors and at the wire stubs of branches decreases the transmission speed, so only point-to-point connections are possible. Once the satellite is launched, repair or replacement is not possible, and system redundancy is introduced. Accordingly, 512 backplane wires would be required. The signal connector would require 1,024pins, including the ground pins used to prevent crosstalk, and would be 512mm wide, which is even wider than the circuit board of each module.

AB - Processor systems that are mounted in satellites must be small and light, having high data transfer rates, and high storage capacity [1]. A small reduction in size and weight could reduce the cost of launching a satellite by a significant amount. The next generation of earth observation satellites will require data transmission rates to a maximum of 20Gb/s and at least one terabyte of storage capacity. The volume, weight, and communication speed of the processor system is determined by the backplane connectors (Fig. 20.4.1). It is difficult to achieve a connector that can pass signals of 2.5Gb/s or more. The signal reflection that occurs when signals are branched at connectors and at the wire stubs of branches decreases the transmission speed, so only point-to-point connections are possible. Once the satellite is launched, repair or replacement is not possible, and system redundancy is introduced. Accordingly, 512 backplane wires would be required. The signal connector would require 1,024pins, including the ground pins used to prevent crosstalk, and would be 512mm wide, which is even wider than the circuit board of each module.

UR - http://www.scopus.com/inward/record.url?scp=84940743983&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84940743983&partnerID=8YFLogxK

U2 - 10.1109/ISSCC.2015.7063112

DO - 10.1109/ISSCC.2015.7063112

M3 - Conference contribution

AN - SCOPUS:84940743983

SN - 9781479962235

VL - 58

SP - 434

EP - 435

BT - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

PB - Institute of Electrical and Electronics Engineers Inc.

ER -