A 720μW 873MHz-1.008GHz injection-locked frequency multiplier with 0.3V supply voltage in 90nm CMOS

Lechang Liu, Keisuke Ishikawa, Tadahiro Kuroda

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)

    Abstract

    A 0.3V parametric resonance based sub-GHz injection-locked frequency multiplier is developed in 90nm CMOS. This is the first reported variation-tolerant frequency multiplier with 0.3V supply voltage. It achieves 720μW power consumption and -110dBc@600kHz phase noise with the lowest supply voltage in state-of-the-art frequency synthesizers.

    Original languageEnglish
    Title of host publication2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers
    PagesC140-C141
    Publication statusPublished - 2013 Sep 17
    Event2013 Symposium on VLSI Circuits, VLSIC 2013 - Kyoto, Japan
    Duration: 2013 Jun 122013 Jun 14

    Publication series

    NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

    Other

    Other2013 Symposium on VLSI Circuits, VLSIC 2013
    CountryJapan
    CityKyoto
    Period13/6/1213/6/14

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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  • Cite this

    Liu, L., Ishikawa, K., & Kuroda, T. (2013). A 720μW 873MHz-1.008GHz injection-locked frequency multiplier with 0.3V supply voltage in 90nm CMOS. In 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers (pp. C140-C141). [6578639] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).