A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS

Yanfei Chen, Sanroku Tsukamoto, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

42 Citations (Scopus)

Abstract

A 9b 100MS/s successive approximation register (SAR) ADC has been implemented in 65nm CMOS, with an active area of 0.012mm2. A tri-level based charge redistribution technique improves DAC switching energy efficiency and settling time, which is achieved by connecting bottom plates of differential capacitor arrays. The ADC achieves an SNDR of 53.1dB (8.53 ENOB) and consumes 1.46mW from a 1.2V supply, resulting in an FOM of 39fJ/conversion-step.

Original languageEnglish
Title of host publicationProceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
Pages145-148
Number of pages4
DOIs
Publication statusPublished - 2009
Event2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 - Taipei, Taiwan, Province of China
Duration: 2009 Nov 162009 Nov 18

Other

Other2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
CountryTaiwan, Province of China
CityTaipei
Period09/11/1609/11/18

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Energy efficiency
Capacitors

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Chen, Y., Tsukamoto, S., & Kuroda, T. (2009). A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. In Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 (pp. 145-148). [5357199] https://doi.org/10.1109/ASSCC.2009.5357199

A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. / Chen, Yanfei; Tsukamoto, Sanroku; Kuroda, Tadahiro.

Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009. 2009. p. 145-148 5357199.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chen, Y, Tsukamoto, S & Kuroda, T 2009, A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. in Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009., 5357199, pp. 145-148, 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009, Taipei, Taiwan, Province of China, 09/11/16. https://doi.org/10.1109/ASSCC.2009.5357199
Chen Y, Tsukamoto S, Kuroda T. A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. In Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009. 2009. p. 145-148. 5357199 https://doi.org/10.1109/ASSCC.2009.5357199
Chen, Yanfei ; Tsukamoto, Sanroku ; Kuroda, Tadahiro. / A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009. 2009. pp. 145-148
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