A Co-processor design of an energy efficient reconfigurable accelerator CMA

Mai Izawa, Nobuaki Ozaki, Yusuke Koizumi, Rie Uno, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Cool Mega Array (CMA) is an energy efficient reconfigurable accelerator consisting of a large PE array with combinatorial circuits and a small microcontroller. In order to enhance the energy efficiency of the total system, a coprocessor design of CMA(Cool Mega Array), called CMA-Geyser is proposed. By replacing the programmable microcontroller by the host processor Geyser with a dedicated hardware controller, the setting up for the CMA and data transfer can be efficiently done. The design using 65nm CMOS process is compared with offloading style multicore system Cube-1. By eliminating the data memory and routers required in Cube-1, CMA-Geyser reduced 24.8% semiconductor area. By reducing both execution time and average power consumption, CMA-Geyser achieved about 3.4 times energy efficiency of Cube-1.

Original languageEnglish
Title of host publicationProceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013
Pages148-154
Number of pages7
DOIs
Publication statusPublished - 2013
Event2013 1st International Symposium on Computing and Networking, CANDAR 2013 - Matsuyama, Ehime, Japan
Duration: 2013 Dec 42013 Dec 6

Other

Other2013 1st International Symposium on Computing and Networking, CANDAR 2013
CountryJapan
CityMatsuyama, Ehime
Period13/12/413/12/6

Fingerprint

Microcontrollers
Particle accelerators
Energy efficiency
Combinatorial circuits
Data transfer
Routers
Electric power utilization
Semiconductor materials
Hardware
Data storage equipment
Controllers
Coprocessor

Keywords

  • Embedded System
  • Low Power Computation
  • Reconfigurable Processors

ASJC Scopus subject areas

  • Computer Networks and Communications

Cite this

Izawa, M., Ozaki, N., Koizumi, Y., Uno, R., & Amano, H. (2013). A Co-processor design of an energy efficient reconfigurable accelerator CMA. In Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013 (pp. 148-154). [6726890] https://doi.org/10.1109/CANDAR.2013.28

A Co-processor design of an energy efficient reconfigurable accelerator CMA. / Izawa, Mai; Ozaki, Nobuaki; Koizumi, Yusuke; Uno, Rie; Amano, Hideharu.

Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013. 2013. p. 148-154 6726890.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Izawa, M, Ozaki, N, Koizumi, Y, Uno, R & Amano, H 2013, A Co-processor design of an energy efficient reconfigurable accelerator CMA. in Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013., 6726890, pp. 148-154, 2013 1st International Symposium on Computing and Networking, CANDAR 2013, Matsuyama, Ehime, Japan, 13/12/4. https://doi.org/10.1109/CANDAR.2013.28
Izawa M, Ozaki N, Koizumi Y, Uno R, Amano H. A Co-processor design of an energy efficient reconfigurable accelerator CMA. In Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013. 2013. p. 148-154. 6726890 https://doi.org/10.1109/CANDAR.2013.28
Izawa, Mai ; Ozaki, Nobuaki ; Koizumi, Yusuke ; Uno, Rie ; Amano, Hideharu. / A Co-processor design of an energy efficient reconfigurable accelerator CMA. Proceedings - 2013 1st International Symposium on Computing and Networking, CANDAR 2013. 2013. pp. 148-154
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