A context dependent clock control mechanism for dynamically reconfigurable processors

H. Amano, Y. Hasegawa, S. Abe, K. Ishikawa, S. Tsutsumi, S. Kurotaki, T. Nakamura, T. Nishimura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Dynamically Reconfigurable Processors improve the area-efficiency by executing a task with multiple hardware contexts. The maximum operational frequency is limited with a context which has the largest delay time, and it causes a certain overhead when each context has various delay time. A context dependent dynamic clock control method, which changes the clock so as to fit the current operational context, is proposed for NEC electronics' DRP-1. A clock generator consisting of a preset-able counter associated with the state transition table for controlling the context switching is proposed. Performance evaluation using several applications reveals that the proposed method improves the performance from 10% to 110% with a small increasing of the power consumption.

Original languageEnglish
Title of host publicationProceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL
Pages575-580
Number of pages6
DOIs
Publication statusPublished - 2006 Dec 1
Event2006 International Conference on Field Programmable Logic and Applications, FPL - Madrid, Spain
Duration: 2006 Aug 282006 Aug 30

Publication series

NameProceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

Other

Other2006 International Conference on Field Programmable Logic and Applications, FPL
CountrySpain
CityMadrid
Period06/8/2806/8/30

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Electrical and Electronic Engineering

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    Amano, H., Hasegawa, Y., Abe, S., Ishikawa, K., Tsutsumi, S., Kurotaki, S., Nakamura, T., & Nishimura, T. (2006). A context dependent clock control mechanism for dynamically reconfigurable processors. In Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL (pp. 575-580). [4101031] (Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL). https://doi.org/10.1109/FPL.2006.311269