A fast handshake join implementation on FPGA with adaptive merging network

Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

One of a critical design issues for implementing handshake-join hardware is result collection performed by a merging network. To address the issue, we introduce an adaptive merging network. Our implementation achieves over 3 million tuples per second when the selectivity is 0.1. The proposed implementation attains up to 5.2x higher throughput than original handshake-join hardware. In this demonstration, we apply the proposed technique to filter out malicious packets from packet streams. To the best of our knowledge, our system is the fastest handshake join implementation on FPGA.

Original languageEnglish
Title of host publicationSSDBM 2013 - Proceedings of the 25th International Conference on Scientific and Statistical Database Management
DOIs
Publication statusPublished - 2013 Aug 30
Event25th International Conference on Scientific and Statistical Database Management, SSDBM 2013 - Baltimore, MD, United States
Duration: 2013 Jul 292013 Jul 31

Publication series

NameACM International Conference Proceeding Series

Other

Other25th International Conference on Scientific and Statistical Database Management, SSDBM 2013
CountryUnited States
CityBaltimore, MD
Period13/7/2913/7/31

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ASJC Scopus subject areas

  • Software
  • Human-Computer Interaction
  • Computer Vision and Pattern Recognition
  • Computer Networks and Communications

Cite this

Oge, Y., Miyoshi, T., Kawashima, H., & Yoshinaga, T. (2013). A fast handshake join implementation on FPGA with adaptive merging network. In SSDBM 2013 - Proceedings of the 25th International Conference on Scientific and Statistical Database Management [44] (ACM International Conference Proceeding Series). https://doi.org/10.1145/2484838.2484868