A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter

Fumitoshi Hatori; Hiroki Ishikuro; Mototsugu Hamada; Ken Ichi Agawa; Shouhei Kousai; Hiroyuki Kobayashi; Due Minh Nguyen

A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter

Fumitoshi Hatori, Hiroki Ishikuro, Mototsugu Hamada, Ken Ichi Agawa, Shouhei Kousai, Hiroyuki Kobayashi, Due Minh Nguyen

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

This paper describes a full-CMOS single-chip Bluetooth LSI fabricated using a 0.18 μm CMOS, triple-well, quad-metal technology. The chip integrates radio and baseband, which is compliant with Bluetooth Core Specification version 1.1. A direct modulation transmitter and a low-IF receiver architecture are employed for the low-power and low-cost implementation. To reduce the power consumption of the digital blocks, it uses a clock gating technique during the active modes and a power manager during the low power modes. The maximum power consumption is 75 mW for the transmission, 120 mW for the reception and 30 μW for the low power mode operation. These values are low enough for mobile applications. Sensitivity of - 80 dBm has been achieved and the transmitter can deliver up to 4 dBm.

Original language	English
Pages (from-to)	556-562
Number of pages	7
Journal	IEICE Transactions on Electronics
Volume	E87-C
Issue number	4
Publication status	Published - 2004 Apr
Externally published	Yes

Keywords

Bluetooth
CMOS transceiver
Direct modulation
Low power
Low-IF
Wireless communication

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

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title = "A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter",

abstract = "This paper describes a full-CMOS single-chip Bluetooth LSI fabricated using a 0.18 μm CMOS, triple-well, quad-metal technology. The chip integrates radio and baseband, which is compliant with Bluetooth Core Specification version 1.1. A direct modulation transmitter and a low-IF receiver architecture are employed for the low-power and low-cost implementation. To reduce the power consumption of the digital blocks, it uses a clock gating technique during the active modes and a power manager during the low power modes. The maximum power consumption is 75 mW for the transmission, 120 mW for the reception and 30 μW for the low power mode operation. These values are low enough for mobile applications. Sensitivity of - 80 dBm has been achieved and the transmitter can deliver up to 4 dBm.",

keywords = "Bluetooth, CMOS transceiver, Direct modulation, Low power, Low-IF, Wireless communication",

author = "Fumitoshi Hatori and Hiroki Ishikuro and Mototsugu Hamada and Agawa, {Ken Ichi} and Shouhei Kousai and Hiroyuki Kobayashi and Nguyen, {Due Minh}",

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T1 - A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter

AU - Hatori, Fumitoshi

AU - Ishikuro, Hiroki

AU - Hamada, Mototsugu

AU - Agawa, Ken Ichi

AU - Kousai, Shouhei

AU - Kobayashi, Hiroyuki

AU - Nguyen, Due Minh

PY - 2004/4

Y1 - 2004/4

N2 - This paper describes a full-CMOS single-chip Bluetooth LSI fabricated using a 0.18 μm CMOS, triple-well, quad-metal technology. The chip integrates radio and baseband, which is compliant with Bluetooth Core Specification version 1.1. A direct modulation transmitter and a low-IF receiver architecture are employed for the low-power and low-cost implementation. To reduce the power consumption of the digital blocks, it uses a clock gating technique during the active modes and a power manager during the low power modes. The maximum power consumption is 75 mW for the transmission, 120 mW for the reception and 30 μW for the low power mode operation. These values are low enough for mobile applications. Sensitivity of - 80 dBm has been achieved and the transmitter can deliver up to 4 dBm.

AB - This paper describes a full-CMOS single-chip Bluetooth LSI fabricated using a 0.18 μm CMOS, triple-well, quad-metal technology. The chip integrates radio and baseband, which is compliant with Bluetooth Core Specification version 1.1. A direct modulation transmitter and a low-IF receiver architecture are employed for the low-power and low-cost implementation. To reduce the power consumption of the digital blocks, it uses a clock gating technique during the active modes and a power manager during the low power modes. The maximum power consumption is 75 mW for the transmission, 120 mW for the reception and 30 μW for the low power mode operation. These values are low enough for mobile applications. Sensitivity of - 80 dBm has been achieved and the transmitter can deliver up to 4 dBm.

KW - Bluetooth

KW - CMOS transceiver

KW - Direct modulation

KW - Low power

KW - Low-IF

KW - Wireless communication

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A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter

Abstract

Keywords

ASJC Scopus subject areas

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