A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA

Akihito Tsusaka, Mai Izawa, Rie Uno, Nobuyuki Ozaki, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Cool Mega Array (CMA) is an energy efficient Coarse Grained Reconfigurable processor Array (CGRA) consisting of a large PE (Processing Element) array. In order to reduce the power for storing intermediate results and clock tree, the PE array is consisting of combinatorial circuits. A hardware completion detection mechanism for CMA is proposed, implemented and evaluated. Each PE uses serially connected buffers with selectable taps, and the delay is decided according to the operation executed in the PE. Since the completion signal is transferred exactly on the same paths that for computation, the delay in the switch and wires are accounted. The post layout simulation revealed that the same performance without the mechanism can be obtained only with 5.1% area overhead and less than 6% extra power consumption. With the mechanism, a single micro-code can be used for various supply voltages to PE array.

Original languageEnglish
Title of host publication2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings
PublisherIEEE Computer Society
DOIs
Publication statusPublished - 2013
Event2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Porto, Portugal
Duration: 2013 Sep 22013 Sep 4

Other

Other2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013
CountryPortugal
CityPorto
Period13/9/213/9/4

Fingerprint

Accelerator
Energy Efficient
Particle accelerators
Hardware
Processing
Completion
Combinatorial circuits
Parallel processing systems
Clocks
Electric power utilization
Power Consumption
Switches
Buffer
Layout
Wire
Switch
Voltage
Electric potential
Path
Simulation

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Applied Mathematics

Cite this

Tsusaka, A., Izawa, M., Uno, R., Ozaki, N., & Amano, H. (2013). A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA. In 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings [6645594] IEEE Computer Society. https://doi.org/10.1109/FPL.2013.6645594

A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA. / Tsusaka, Akihito; Izawa, Mai; Uno, Rie; Ozaki, Nobuyuki; Amano, Hideharu.

2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings. IEEE Computer Society, 2013. 6645594.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tsusaka, A, Izawa, M, Uno, R, Ozaki, N & Amano, H 2013, A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA. in 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings., 6645594, IEEE Computer Society, 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013, Porto, Portugal, 13/9/2. https://doi.org/10.1109/FPL.2013.6645594
Tsusaka A, Izawa M, Uno R, Ozaki N, Amano H. A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA. In 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings. IEEE Computer Society. 2013. 6645594 https://doi.org/10.1109/FPL.2013.6645594
Tsusaka, Akihito ; Izawa, Mai ; Uno, Rie ; Ozaki, Nobuyuki ; Amano, Hideharu. / A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA. 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings. IEEE Computer Society, 2013.
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