A high-speed tandem-crosspoint ATM switch architecture with input and output buffers

Eiji Oki, Naoaki Yamanaka

Research output: Contribution to journalArticle

15 Citations (Scopus)

Abstract

This paper proposes a high-speed input and output buffering ATM switch, named Tandem-Crosspoint (TDXP) switch. The TDXP switch consists of multiple crossbar switch planes. These switch planes are connected in tandem at every crosspoint. Even if a cell can not be transmitted to an output port on the first plane, it has a chance to be transmitted on the next plane. Cell transmission is executed on each switch plane in a pipeline manner. Therefore, more than one cell can be transmitted to the same output port within one cell time slot, although the internal line speed of each switch is equal to the input /output line speed. The TDXP switch architecture has several advantages in implementation. First, the TDXP switch does not increase the internal line speed in eliminating Head-Of-Line (HOL) blocking. Second, since the TDXP switch employs a simple cell reading algorithm at the input buffer in order to retain the cell sequence, the TDXP switch does not require to rebuild the cell sequences at output buffers using time stamps, as is required by a parallel switch. These merits make implementing the high-speed ATM switch easy. Numerical results show that the TDXP switch can eliminate the HOL blocking effectively and achieve high throughput both for unicasting and multicasting traffic. This switch architecture is expected to enable the development of high-speed ATM switching systems that can realize over 1 Tb/s throughput in a cost-effective way.

Original languageEnglish
Pages (from-to)215-222
Number of pages8
JournalIEICE Transactions on Communications
VolumeE81-B
Issue number2
Publication statusPublished - 1998
Externally publishedYes

Fingerprint

Automatic teller machines
Switches
Throughput
Multicasting
Switching systems
Telecommunication traffic

Keywords

  • ATM
  • Buffer
  • Crosspoint
  • High-speed
  • Switch

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Networks and Communications

Cite this

A high-speed tandem-crosspoint ATM switch architecture with input and output buffers. / Oki, Eiji; Yamanaka, Naoaki.

In: IEICE Transactions on Communications, Vol. E81-B, No. 2, 1998, p. 215-222.

Research output: Contribution to journalArticle

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