TY - JOUR
T1 - A layout-oriented routing method for low-latency HPC networks
AU - Kawano, Ryuta
AU - Nakahara, Hiroshi
AU - Fujiwara, Ikki
AU - Matsutani, Hiroki
AU - Koibuchi, Michihiro
AU - Amano, Hideharu
N1 - Funding Information:
A part of this work was supported by JSPS KAKENHI Grant Number 15J03374.
Publisher Copyright:
Copyright © 2017 The Institute of Electronics, Information and Communication Engineers.
PY - 2017/12
Y1 - 2017/12
N2 - End-to-end network latency has become an important issue for parallel application on large-scale high performance computing (HPC) systems. It has been reported that randomly-connected inter-switch networks can lower the end-to-end network latency. This latency reduction is established in exchange for a large amount of routing information. That is, minimal routing on irregular networks is achieved by using routing tables for all destinations in the networks. In this work, a novel distributed routing method called LOREN (Layout-Oriented Routing with Entries for Neighbors) to achieve low-latency with a small routing table is proposed for irregular networks whose link length is limited. The routing tables contain both physically and topologically nearby neighbor nodes to ensure livelock-freedom and a small number of hops between nodes. Experimental results show that LOREN reduces the average latencies by 5.8% and improves the network throughput by up to 62% compared with a conventional compact routing method. Moreover, the number of required routing table entries is reduced by up to 91%, which improves scalability and flexibility for implementation.
AB - End-to-end network latency has become an important issue for parallel application on large-scale high performance computing (HPC) systems. It has been reported that randomly-connected inter-switch networks can lower the end-to-end network latency. This latency reduction is established in exchange for a large amount of routing information. That is, minimal routing on irregular networks is achieved by using routing tables for all destinations in the networks. In this work, a novel distributed routing method called LOREN (Layout-Oriented Routing with Entries for Neighbors) to achieve low-latency with a small routing table is proposed for irregular networks whose link length is limited. The routing tables contain both physically and topologically nearby neighbor nodes to ensure livelock-freedom and a small number of hops between nodes. Experimental results show that LOREN reduces the average latencies by 5.8% and improves the network throughput by up to 62% compared with a conventional compact routing method. Moreover, the number of required routing table entries is reduced by up to 91%, which improves scalability and flexibility for implementation.
KW - High performance computing
KW - Interconnection networks
KW - Network topology
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U2 - 10.1587/transinf.2017PAP0019
DO - 10.1587/transinf.2017PAP0019
M3 - Article
AN - SCOPUS:85038381248
VL - E100D
SP - 2796
EP - 2807
JO - IEICE Transactions on Information and Systems
JF - IEICE Transactions on Information and Systems
SN - 0916-8532
IS - 12
ER -