A low latency high bandwidth network interface prototype for PC cluster

N. Tanabe, Y. Hamada, H. Nakajo, H. Imashiro, J. Yamamoto, T. Kudoh, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

A high performance network interface prototype for PC clusters called DIMMnet-1 that can be directly plugged into a DIMM slot of a PC is presented. By using both a low latency AOTF (atomic on-the-fly) sending and a high bandwidth BOTF (block on-the-fly) sending, it can overcome the overhead caused by standard I/O bus such as a PCI bus. Currently, two types of DIMMnet-1 prototype boards (providing optical and electrical network interface) equipped with a network interface controller chip Martini are available. They can be plugged into a 100 MHz DIMM slot of a PC with Pentium 3, Pentium 4 or Athlon. Experimental evaluation results of communication performance with the AOTF sending on a real system are shown. Estimated bandwidth with the BOTF sending is also shown.

Original languageEnglish
Title of host publicationProceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems
PublisherIEEE Computer Society
Pages87-94
Number of pages8
Volume2002-January
ISBN (Print)0769516351
DOIs
Publication statusPublished - 2002
EventInternational Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2002 - Big Island, United States
Duration: 2002 Jan 11 → …

Other

OtherInternational Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2002
CountryUnited States
CityBig Island
Period02/1/11 → …

Fingerprint

Interfaces (computer)
Bandwidth
Controllers
Communication

Keywords

  • Agriculture
  • Bandwidth
  • Costs
  • Degradation
  • Delay
  • Network interfaces
  • Optical fiber communication
  • Personal communication networks
  • Prototypes
  • Trademarks

ASJC Scopus subject areas

  • Hardware and Architecture

Cite this

Tanabe, N., Hamada, Y., Nakajo, H., Imashiro, H., Yamamoto, J., Kudoh, T., & Amano, H. (2002). A low latency high bandwidth network interface prototype for PC cluster. In Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems (Vol. 2002-January, pp. 87-94). [1035022] IEEE Computer Society. https://doi.org/10.1109/IWIA.2002.1035022

A low latency high bandwidth network interface prototype for PC cluster. / Tanabe, N.; Hamada, Y.; Nakajo, H.; Imashiro, H.; Yamamoto, J.; Kudoh, T.; Amano, Hideharu.

Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. Vol. 2002-January IEEE Computer Society, 2002. p. 87-94 1035022.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tanabe, N, Hamada, Y, Nakajo, H, Imashiro, H, Yamamoto, J, Kudoh, T & Amano, H 2002, A low latency high bandwidth network interface prototype for PC cluster. in Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. vol. 2002-January, 1035022, IEEE Computer Society, pp. 87-94, International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2002, Big Island, United States, 02/1/11. https://doi.org/10.1109/IWIA.2002.1035022
Tanabe N, Hamada Y, Nakajo H, Imashiro H, Yamamoto J, Kudoh T et al. A low latency high bandwidth network interface prototype for PC cluster. In Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. Vol. 2002-January. IEEE Computer Society. 2002. p. 87-94. 1035022 https://doi.org/10.1109/IWIA.2002.1035022
Tanabe, N. ; Hamada, Y. ; Nakajo, H. ; Imashiro, H. ; Yamamoto, J. ; Kudoh, T. ; Amano, Hideharu. / A low latency high bandwidth network interface prototype for PC cluster. Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. Vol. 2002-January IEEE Computer Society, 2002. pp. 87-94
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