TY - GEN
T1 - A Low Noise Analog Front-end Design with an N-path Filter for Dry EEG Recording
AU - Deguchi, Takumi
AU - Tanaka, Ryoya
AU - Kawazoe, Shohei
AU - Fukuoka, Ryuto
AU - Nakano, Nobuhiko
N1 - Funding Information:
The VLSI chip used in this study was fabricated as part of the chip fabrication program of the VLSI Design and Education Center (VDEC) at the University of Tokyo in collaboration with Rohm Corporation and Toppan Printing Corporation and Cadence Design Systems, Inc.
Publisher Copyright:
© 2018 IEEE.
PY - 2018/11
Y1 - 2018/11
N2 - We introduce a low noise analog front-end(AFE) prototype design for dry EEG(electroencephalogram) recording. This AFE utilizes an N-path filter with sample and hold (S/H) circuit for hum noise reduction. For the first stage of the AFE, chopping stabilization technique is used for flicker noise reduction and the capacitive-feedback topology with pseudo resistor eliminates electrode offset with efficient area utilization. The programmable gain amplifier (PGA) at the third stage of the AFE can vary its magnification in the range of 10 to 640 times, therefore it can be adjusted to make the resolution high. These components are designed in 0.18 μ m CMOS process and we simulated and measured their characteristics.
AB - We introduce a low noise analog front-end(AFE) prototype design for dry EEG(electroencephalogram) recording. This AFE utilizes an N-path filter with sample and hold (S/H) circuit for hum noise reduction. For the first stage of the AFE, chopping stabilization technique is used for flicker noise reduction and the capacitive-feedback topology with pseudo resistor eliminates electrode offset with efficient area utilization. The programmable gain amplifier (PGA) at the third stage of the AFE can vary its magnification in the range of 10 to 640 times, therefore it can be adjusted to make the resolution high. These components are designed in 0.18 μ m CMOS process and we simulated and measured their characteristics.
KW - CMRR
KW - EEG
KW - N-path filter
KW - analog front-end
KW - chopper stabilization
UR - http://www.scopus.com/inward/record.url?scp=85077029177&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85077029177&partnerID=8YFLogxK
U2 - 10.1109/ISPACS.2018.8923537
DO - 10.1109/ISPACS.2018.8923537
M3 - Conference contribution
AN - SCOPUS:85077029177
T3 - ISPACS 2018 - 2018 International Symposium on Intelligent Signal Processing and Communication Systems
SP - 523
EP - 526
BT - ISPACS 2018 - 2018 International Symposium on Intelligent Signal Processing and Communication Systems
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2018
Y2 - 27 November 2018 through 30 November 2018
ER -