A metamorphotic Network-on-Chip for various types of parallel applications

Seiichi Tade, Hiroki Matsutani, Hideharu Amano, Michihiro Koibuchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A metamorphotic Network-on-Chip (NoC) architecture is proposed in order to customize for performance or energy consumption on a per-application basis. Adding reconfigurability on conventional topologies has been studied so far especially for application workloads that can be statically analyzed. In this context, we propose such a platform to take care of both the static and the dynamic cases where application workloads cannot be statically analyzed while performance or energy constraints are given. Our metamorphotic NoC reconfigures its topology, routing, operating frequency, and supply voltage based on the following three modes. 1) Regular mode uses a traditional mesh topology for neighboring communications. As the link length is short and uniform, it can be operated at a higher frequency and higher voltage, while a long-range communication increases the path length. 2) Random mode uses a random topology for unknown workloads to reduce the path length by exploiting the small-world effect. As the path length is reduced but the wire delay is increased, it is intended for a lower operating frequency and lower voltage. 3) Custom mode uses an optimized topology for given workloads. To support Random and Custom modes, assembled multiplexers are embedded into the metamorphotic NoC. Random and Regular/Custom modes are generated by randomly or selectively reconfiguring these multiplexers, respectively, based on the performance or energy constraints. This paper explores the design space of assembled multiplexers and provides a reasonable design recommendation through a graph analysis. It is demonstrated based on experimental results on the area overhead, operating frequency, network performance, and energy consumption. The results show that Regular mode can operate at 1.27GHz and Random mode can reduce the average network latency by 19.6% and the energy consumption by 44.2% compared with a traditional NoC that has mesh topology with little overhead. Custom mode can reduce them as well as Random mode.

Original languageEnglish
Title of host publicationProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages98-105
Number of pages8
Volume2015-September
ISBN (Print)9781479919246
DOIs
Publication statusPublished - 2015 Sep 8
Event26th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2015 - Toronto, Canada
Duration: 2015 Jul 272015 Jul 29

Other

Other26th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2015
CountryCanada
CityToronto
Period15/7/2715/7/29

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications

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  • Cite this

    Tade, S., Matsutani, H., Amano, H., & Koibuchi, M. (2015). A metamorphotic Network-on-Chip for various types of parallel applications. In Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors (Vol. 2015-September, pp. 98-105). [7245715] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASAP.2015.7245715