A network switch for supporting high-performance parallel processing by computers distributed in local areas

Hiroaki Nishi, Koji Tasho, Tomohiro Kudoh, Hideharu Amano

Research output: Contribution to journalArticle

Abstract

The authors have developed a communications architecture called RHiNET that is capable of high-performance parallel processing by interconnecting PCs and WSs. RHiNET uses not only computers concentrated in one place but also computers used for daily business within buildings and within floors for parallel processing. Networks used by RHiNET should have high effective bandwidths and small latencies for high-efficiency computing, as well as link lengths for connecting the computers within buildings and floors and a free topology. The former requirements are not satisfied sufficiently by the conventional LANs, while the latter is not satisfied by SANs which are used in cluster systems. RHiNET satisfies both conditions by using a switch having a large memory capacity. In this paper, the architecture and implementation of the RHiNET/SW1 switch used by RHiNET networks are discussed. A scheme called virtual cache is used in RHiNET/SW1 such that a large-capacity packet buffer is installed by SRAM outside the switch ASIC. In addition, the performance of the switch is evaluated by a simulator.

Original languageEnglish
Pages (from-to)24-33
Number of pages10
JournalSystems and Computers in Japan
Volume32
Issue number14
DOIs
Publication statusPublished - 2001 Dec 1
Externally publishedYes

Keywords

  • Asynchronous wormhole routing
  • High-speed network
  • Optical interconnection
  • Parallel distributed processing
  • Structured channel method

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Information Systems
  • Hardware and Architecture
  • Computational Theory and Mathematics

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