A network switch using optical interconnection for high performance parallel computing using PCs: High-density implementation of high-speed signals for a one-chip electronic switch with optical interconnections

Shinji Nishimura, Tomohiro Kudoh, Hiroaki Nishi, Katsuyoshi Harasawa, Nobuhiro Matsudaira, Shigeto Akutsu, Koji Tasyo, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

A large throughput, low latency network switch (RHiNET-2/SW) has been developed for a distributed parallel computing system. This switch has a new architecture to support low latency "zero-copy" communication in multi-tasking environments. Eight pairs of 800-Mbit/s×12-channel optical interconnection modules and a CMOS ASIC switch are implemented on a compact circuit board. To achieve large-throughput (64 Gbit/s) and low-latency network performance, the SW-LSI has a customized high-speed LVDS I/O interface, and high-speed internal SRAM memory in a 784-pin-BGA one-chip package. Also, we have developed the device implementation technologies to overcome the electrical problems (crosstalk, skew, reflection and noise). These implementation technologies are applicable for switches used in other high-speed networks such as GSN, 4 Gbit/s Fiber Channel or 10 Gbit/s Ethernet.

Original languageEnglish
Title of host publicationProceedings - 6th International Conference on Parallel Interconnects, PI 1999
EditorsEugen Schenfeld, Ray Kostuk, Craig Lund, Michael Haney
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages5-12
Number of pages8
ISBN (Electronic)076950440X, 9780769504407
DOIs
Publication statusPublished - 1999 Jan 1
Event6th International Conference on Parallel Interconnects, PI 1999 - Anchorage, United States
Duration: 1999 Oct 171999 Oct 19

Publication series

NameProceedings - 6th International Conference on Parallel Interconnects, PI 1999

Other

Other6th International Conference on Parallel Interconnects, PI 1999
CountryUnited States
CityAnchorage
Period99/10/1799/10/19

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

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  • Cite this

    Nishimura, S., Kudoh, T., Nishi, H., Harasawa, K., Matsudaira, N., Akutsu, S., Tasyo, K., & Amano, H. (1999). A network switch using optical interconnection for high performance parallel computing using PCs: High-density implementation of high-speed signals for a one-chip electronic switch with optical interconnections. In E. Schenfeld, R. Kostuk, C. Lund, & M. Haney (Eds.), Proceedings - 6th International Conference on Parallel Interconnects, PI 1999 (pp. 5-12). [806389] (Proceedings - 6th International Conference on Parallel Interconnects, PI 1999). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PI.1999.806389