A Parallel Algorithm for Allocation of Spare Cells on Memory Chips

Nobuo Funabiki, Yoshiyasu Takefuji

Research output: Contribution to journalArticle

26 Citations (Scopus)

Abstract

In manufacturing memory chips, Redundant Random Access Memory (RRAM) technology has been widely used because it not only provides repair of faulty cells but also enhances the production yield. RRAM has several rows and columns of spare memory cells which are used to replace the faulty cells. The goal of our algorithm is to find a spare allocation which repairs all the faulty cells in the given faulty-cell map. The parallel algorithm requires In processing elements for the n x n faulty-cell map problem. The algorithm is verified by many simulation runs. Under the simulation the algorithm finds one of the near-optimum solutions in a nearly constant time with 0(n) processors. The simulation results show the consistency of our algorithm. The algorithm can be easily extended for solving rectangular or other shapes of fault map problems. Reader Aids - Purpose: Present a new algorithm Special math needed for explanations: Probability Special math needed to use results: None Results useful to: Reliability theoreticians and analysts.

Original languageEnglish
Pages (from-to)338-346
Number of pages9
JournalIEEE Transactions on Reliability
Volume40
Issue number3
DOIs
Publication statusPublished - 1991
Externally publishedYes

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Parallel algorithms
Data storage equipment
Repair
Processing

Keywords

  • Artificial neural network
  • Hysteresis McCulloch-Pitts neuron model
  • Parallel algorithm
  • Parallel computing
  • Spare allocation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

Cite this

A Parallel Algorithm for Allocation of Spare Cells on Memory Chips. / Funabiki, Nobuo; Takefuji, Yoshiyasu.

In: IEEE Transactions on Reliability, Vol. 40, No. 3, 1991, p. 338-346.

Research output: Contribution to journalArticle

@article{de95b339b3184b7585fa9b3dc4b4a35b,
title = "A Parallel Algorithm for Allocation of Spare Cells on Memory Chips",
abstract = "In manufacturing memory chips, Redundant Random Access Memory (RRAM) technology has been widely used because it not only provides repair of faulty cells but also enhances the production yield. RRAM has several rows and columns of spare memory cells which are used to replace the faulty cells. The goal of our algorithm is to find a spare allocation which repairs all the faulty cells in the given faulty-cell map. The parallel algorithm requires In processing elements for the n x n faulty-cell map problem. The algorithm is verified by many simulation runs. Under the simulation the algorithm finds one of the near-optimum solutions in a nearly constant time with 0(n) processors. The simulation results show the consistency of our algorithm. The algorithm can be easily extended for solving rectangular or other shapes of fault map problems. Reader Aids - Purpose: Present a new algorithm Special math needed for explanations: Probability Special math needed to use results: None Results useful to: Reliability theoreticians and analysts.",
keywords = "Artificial neural network, Hysteresis McCulloch-Pitts neuron model, Parallel algorithm, Parallel computing, Spare allocation",
author = "Nobuo Funabiki and Yoshiyasu Takefuji",
year = "1991",
doi = "10.1109/24.85454",
language = "English",
volume = "40",
pages = "338--346",
journal = "IEEE Transactions on Reliability",
issn = "0018-9529",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "3",

}

TY - JOUR

T1 - A Parallel Algorithm for Allocation of Spare Cells on Memory Chips

AU - Funabiki, Nobuo

AU - Takefuji, Yoshiyasu

PY - 1991

Y1 - 1991

N2 - In manufacturing memory chips, Redundant Random Access Memory (RRAM) technology has been widely used because it not only provides repair of faulty cells but also enhances the production yield. RRAM has several rows and columns of spare memory cells which are used to replace the faulty cells. The goal of our algorithm is to find a spare allocation which repairs all the faulty cells in the given faulty-cell map. The parallel algorithm requires In processing elements for the n x n faulty-cell map problem. The algorithm is verified by many simulation runs. Under the simulation the algorithm finds one of the near-optimum solutions in a nearly constant time with 0(n) processors. The simulation results show the consistency of our algorithm. The algorithm can be easily extended for solving rectangular or other shapes of fault map problems. Reader Aids - Purpose: Present a new algorithm Special math needed for explanations: Probability Special math needed to use results: None Results useful to: Reliability theoreticians and analysts.

AB - In manufacturing memory chips, Redundant Random Access Memory (RRAM) technology has been widely used because it not only provides repair of faulty cells but also enhances the production yield. RRAM has several rows and columns of spare memory cells which are used to replace the faulty cells. The goal of our algorithm is to find a spare allocation which repairs all the faulty cells in the given faulty-cell map. The parallel algorithm requires In processing elements for the n x n faulty-cell map problem. The algorithm is verified by many simulation runs. Under the simulation the algorithm finds one of the near-optimum solutions in a nearly constant time with 0(n) processors. The simulation results show the consistency of our algorithm. The algorithm can be easily extended for solving rectangular or other shapes of fault map problems. Reader Aids - Purpose: Present a new algorithm Special math needed for explanations: Probability Special math needed to use results: None Results useful to: Reliability theoreticians and analysts.

KW - Artificial neural network

KW - Hysteresis McCulloch-Pitts neuron model

KW - Parallel algorithm

KW - Parallel computing

KW - Spare allocation

UR - http://www.scopus.com/inward/record.url?scp=84942210268&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84942210268&partnerID=8YFLogxK

U2 - 10.1109/24.85454

DO - 10.1109/24.85454

M3 - Article

VL - 40

SP - 338

EP - 346

JO - IEEE Transactions on Reliability

JF - IEEE Transactions on Reliability

SN - 0018-9529

IS - 3

ER -