A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Koichiro Ishibashi; Nobuyuki Sugii; Kimiyoshi Usami; Hideharu Amano; Kazutoshi Kobayashi; Cong Kha Pham; Hideki Makiyama; Yoshiki Yamamoto; Hirofumi Shinohara; Toshiaki Iwamatsu; Yasuo Yamaguchi; Hidekazu Oda; Takumi Hasegawa; Shinobu Okanishi; Hiroshi Yanagita; Shiro Kamohara; Masaru Kadoshima; Keiichi Maekawa; Tomohiro Yamashita; Duc Hung Le; Takumu Yomogita; Masaru Kudo; Kuniaki Kitamori; Shuya Kondo; Yuuki Manzawa

doi:10.1109/CoolChips.2014.6842954

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc Hung LeTakumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo, Yuuki Manzawa

Department of Information and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

21 Citations (Scopus)

Abstract

A 32-bit CPU which operates with the lowest energy of 13.4 pJ/cycle at 0.35V and 14MHz, operates at 0.22V to 1.2V and with 0.14μA sleep current is demonstrated. The low power performance is attained by Reverse-Body-Bias- Assisted 65nm SOTB CMOS (Silicon On Thin Buried oxide) technology. The CPU can operate more than 100 years with 610mAH Li battery.

Original language	English
Title of host publication	IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII
Publisher	IEEE Computer Society
ISBN (Print)	9781479938094
DOIs	https://doi.org/10.1109/CoolChips.2014.6842954
Publication status	Published - 2014
Event	17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014 - Yokohama, Japan Duration: 2014 Apr 14 → 2014 Apr 16

Publication series

Name	IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII

Other

Other	17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014
Country/Territory	Japan
City	Yokohama
Period	14/4/14 → 14/4/16

Keywords

CMOS
MCU
SOI
SOTB

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/CoolChips.2014.6842954

Cite this

Ishibashi, K., Sugii, N., Usami, K., Amano, H., Kobayashi, K., Pham, C. K., Makiyama, H., Yamamoto, Y., Shinohara, H., Iwamatsu, T., Yamaguchi, Y., Oda, H., Hasegawa, T., Okanishi, S., Yanagita, H., Kamohara, S., Kadoshima, M., Maekawa, K., Yamashita, T., ... Manzawa, Y. (2014). A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology. In IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII [6842954] (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII). IEEE Computer Society. https://doi.org/10.1109/CoolChips.2014.6842954

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology. / Ishibashi, Koichiro; Sugii, Nobuyuki; Usami, Kimiyoshi et al.
IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII. IEEE Computer Society, 2014. 6842954 (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ishibashi, K, Sugii, N, Usami, K, Amano, H, Kobayashi, K, Pham, CK, Makiyama, H, Yamamoto, Y, Shinohara, H, Iwamatsu, T, Yamaguchi, Y, Oda, H, Hasegawa, T, Okanishi, S, Yanagita, H, Kamohara, S, Kadoshima, M, Maekawa, K, Yamashita, T, Le, DH, Yomogita, T, Kudo, M, Kitamori, K, Kondo, S & Manzawa, Y 2014, A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology. in IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII., 6842954, IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII, IEEE Computer Society, 17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014, Yokohama, Japan, 14/4/14. https://doi.org/10.1109/CoolChips.2014.6842954

Ishibashi K, Sugii N, Usami K, Amano H, Kobayashi K, Pham CK et al. A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology. In IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII. IEEE Computer Society. 2014. 6842954. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII). doi: 10.1109/CoolChips.2014.6842954

Ishibashi, Koichiro ; Sugii, Nobuyuki ; Usami, Kimiyoshi et al. / A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology. IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII. IEEE Computer Society, 2014. (IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII).

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abstract = "A 32-bit CPU which operates with the lowest energy of 13.4 pJ/cycle at 0.35V and 14MHz, operates at 0.22V to 1.2V and with 0.14μA sleep current is demonstrated. The low power performance is attained by Reverse-Body-Bias- Assisted 65nm SOTB CMOS (Silicon On Thin Buried oxide) technology. The CPU can operate more than 100 years with 610mAH Li battery.",

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author = "Koichiro Ishibashi and Nobuyuki Sugii and Kimiyoshi Usami and Hideharu Amano and Kazutoshi Kobayashi and Pham, {Cong Kha} and Hideki Makiyama and Yoshiki Yamamoto and Hirofumi Shinohara and Toshiaki Iwamatsu and Yasuo Yamaguchi and Hidekazu Oda and Takumi Hasegawa and Shinobu Okanishi and Hiroshi Yanagita and Shiro Kamohara and Masaru Kadoshima and Keiichi Maekawa and Tomohiro Yamashita and Le, {Duc Hung} and Takumu Yomogita and Masaru Kudo and Kuniaki Kitamori and Shuya Kondo and Yuuki Manzawa",

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doi = "10.1109/CoolChips.2014.6842954",

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AU - Usami, Kimiyoshi

AU - Amano, Hideharu

AU - Kobayashi, Kazutoshi

AU - Pham, Cong Kha

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AU - Iwamatsu, Toshiaki

AU - Yamaguchi, Yasuo

AU - Oda, Hidekazu

AU - Hasegawa, Takumi

AU - Okanishi, Shinobu

AU - Yanagita, Hiroshi

AU - Kamohara, Shiro

AU - Kadoshima, Masaru

AU - Maekawa, Keiichi

AU - Yamashita, Tomohiro

AU - Le, Duc Hung

AU - Yomogita, Takumu

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A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Abstract

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Keywords

ASJC Scopus subject areas

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