TY - GEN
T1 - A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations
AU - Miyashita, Daisuke
AU - Ishikuro, Hiroki
AU - Kousai, Shouhei
AU - Kobayashi, Hiroyuki
AU - Majima, Hideaki
AU - Agawa, Kenichi
AU - Hamada, Mototsugu
PY - 2005
Y1 - 2005
N2 - An automatic amplitude control circuit to minimize the phase noise of a LC-VCO is proposed and implemented by a 0.18-μm CMOS process. The phase noise lower than -90dBc/Hz at 100kHz offset is achieved over a wide tuning range (from 2.2GHz to 2.8GHz) under large process (ΔVth = ±100mV), temperature (from -35°C to 85°C), and power supply (from 1.8V to 3V) variations.
AB - An automatic amplitude control circuit to minimize the phase noise of a LC-VCO is proposed and implemented by a 0.18-μm CMOS process. The phase noise lower than -90dBc/Hz at 100kHz offset is achieved over a wide tuning range (from 2.2GHz to 2.8GHz) under large process (ΔVth = ±100mV), temperature (from -35°C to 85°C), and power supply (from 1.8V to 3V) variations.
UR - http://www.scopus.com/inward/record.url?scp=33847170576&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33847170576&partnerID=8YFLogxK
U2 - 10.1109/CICC.2005.1568735
DO - 10.1109/CICC.2005.1568735
M3 - Conference contribution
AN - SCOPUS:33847170576
SN - 0780390237
SN - 9780780390232
T3 - Proceedings of the Custom Integrated Circuits Conference
SP - 583
EP - 586
BT - Proceedings of the IEEE 2005 Custom Integrated Circuits Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - IEEE 2005 Custom Integrated Circuits Conference
Y2 - 18 September 2005 through 21 September 2005
ER -