A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations

Daisuke Miyashita, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Citations (Scopus)

Abstract

An automatic amplitude control circuit to minimize the phase noise of a LC-VCO is proposed and implemented by a 0.18-μm CMOS process. The phase noise lower than -90dBc/Hz at 100kHz offset is achieved over a wide tuning range (from 2.2GHz to 2.8GHz) under large process (ΔVth = ±100mV), temperature (from -35°C to 85°C), and power supply (from 1.8V to 3V) variations.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2005 Custom Integrated Circuits Conference
Pages578-581
Number of pages4
DOIs
Publication statusPublished - 2005 Dec 1
EventIEEE 2005 Custom Integrated Circuits Conference - San Jose, CA, United States
Duration: 2005 Sep 182005 Sep 21

Publication series

NameProceedings of the Custom Integrated Circuits Conference
Volume2005
ISSN (Print)0886-5930

Other

OtherIEEE 2005 Custom Integrated Circuits Conference
CountryUnited States
CitySan Jose, CA
Period05/9/1805/9/21

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Miyashita, D., Ishikuro, H., Kousai, S., Kobayashi, H., Majima, H., Agawa, K., & Hamada, M. (2005). A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference (pp. 578-581). [1568735] (Proceedings of the Custom Integrated Circuits Conference; Vol. 2005). https://doi.org/10.1109/CICC.2005.1568735