Abstract
This paper presents an ADC with programmability between SAR-only mode and delta-sigma (δΣassisted mode. The ?assisted mode brings 1st order noise shaping for resolution enhancement. Proposed charge shuttling technique makes it possible to share a charge re-distribution capacitor array for DAC in SAR, feedback DAC, and integrator capacitor in δΣloop and improve the accuracy. The prototype ADC fabricated in 65- nm CMOS achieved SNDR of 44.35 dB at sampling rate of 32 MHz and power consumption of 0.55mW. The SNDR is improved to 62.9dB by δΣassisted mode when the signal bandwidth is 60 kHz.
| Original language | English |
|---|---|
| Title of host publication | ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 51-52 |
| Number of pages | 2 |
| ISBN (Electronic) | 9781467393089 |
| DOIs | |
| Publication status | Published - 2016 Dec 27 |
| Event | 13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of Duration: 2016 Oct 23 → 2016 Oct 26 |
Other
| Other | 13th International SoC Design Conference, ISOCC 2016 |
|---|---|
| Country | Korea, Republic of |
| City | Jeju |
| Period | 16/10/23 → 16/10/26 |
Keywords
- Charge shuttling
- Delta-sigma
- Programmable
- SAR
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering
- Instrumentation
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Cite this
Yamada, K., Toyama, Y., & Ishikuro, H. (2016). A Programmable δΣSAR-ADC with charge shuttling technique. In ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things (pp. 51-52). [7799704] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2016.7799704