A prototype chip of multicontext FPGA with DRAM for virtual hardware

D. Kawakami; Y. Shibata; H. Amano

doi:10.1109/ASPDAC.2001.913267

A prototype chip of multicontext FPGA with DRAM for virtual hardware

D. Kawakami, Y. Shibata, H. Amano

Department of Information and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

DRAM-type multicontext FPGA has potential for virtual hardware, since it is possible to implement a large number of contexts in a single chip. However, only a few examples have been reported because of the difficulty of the mixed process involving DRAM and logic. Here we try to implement a prototype multicontext FPGA with DRAM for virtual hardware.

Original language	English
Title of host publication	Proceedings of the ASP-DAC 2001
Subtitle of host publication	Asia and South Pacific Design Automation Conference 2001
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	17-18
Number of pages	2
ISBN (Electronic)	0780366336
DOIs	https://doi.org/10.1109/ASPDAC.2001.913267
Publication status	Published - 2001 Jan 1
Event	Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 - Yokohama, Japan Duration: 2001 Jan 30 → 2001 Feb 2

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume	2001-January

Other

Other	Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001
Country/Territory	Japan
City	Yokohama
Period	01/1/30 → 01/2/2

Keywords

Computer science
Field programmable gate arrays
Hardware
Multiplexing
Programmable logic arrays
Prototypes
Random access memory
Reconfigurable logic
Table lookup
Virtual prototyping

ASJC Scopus subject areas

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

Access to Document

10.1109/ASPDAC.2001.913267

Cite this

Kawakami, D., Shibata, Y., & Amano, H. (2001). A prototype chip of multicontext FPGA with DRAM for virtual hardware. In Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001 (pp. 17-18). [913267] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 2001-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2001.913267

A prototype chip of multicontext FPGA with DRAM for virtual hardware. / Kawakami, D.; Shibata, Y.; Amano, H.

Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc., 2001. p. 17-18 913267 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 2001-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kawakami, D, Shibata, Y & Amano, H 2001, A prototype chip of multicontext FPGA with DRAM for virtual hardware. in Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001., 913267, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, vol. 2001-January, Institute of Electrical and Electronics Engineers Inc., pp. 17-18, Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001, Yokohama, Japan, 01/1/30. https://doi.org/10.1109/ASPDAC.2001.913267

Kawakami D, Shibata Y, Amano H. A prototype chip of multicontext FPGA with DRAM for virtual hardware. In Proceedings of the ASP-DAC 2001: Asia and South Pacific Design Automation Conference 2001. Institute of Electrical and Electronics Engineers Inc. 2001. p. 17-18. 913267. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1109/ASPDAC.2001.913267

@inproceedings{bf5e16d2d1ad41f2ad19665324e4c9ff,

title = "A prototype chip of multicontext FPGA with DRAM for virtual hardware",

abstract = "DRAM-type multicontext FPGA has potential for virtual hardware, since it is possible to implement a large number of contexts in a single chip. However, only a few examples have been reported because of the difficulty of the mixed process involving DRAM and logic. Here we try to implement a prototype multicontext FPGA with DRAM for virtual hardware.",

keywords = "Computer science, Field programmable gate arrays, Hardware, Multiplexing, Programmable logic arrays, Prototypes, Random access memory, Reconfigurable logic, Table lookup, Virtual prototyping",

author = "D. Kawakami and Y. Shibata and H. Amano",

year = "2001",

month = jan,

day = "1",

doi = "10.1109/ASPDAC.2001.913267",

language = "English",

series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "17--18",

booktitle = "Proceedings of the ASP-DAC 2001",

note = "Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001 ; Conference date: 30-01-2001 Through 02-02-2001",

}

TY - GEN

T1 - A prototype chip of multicontext FPGA with DRAM for virtual hardware

AU - Kawakami, D.

AU - Shibata, Y.

AU - Amano, H.

PY - 2001/1/1

Y1 - 2001/1/1

N2 - DRAM-type multicontext FPGA has potential for virtual hardware, since it is possible to implement a large number of contexts in a single chip. However, only a few examples have been reported because of the difficulty of the mixed process involving DRAM and logic. Here we try to implement a prototype multicontext FPGA with DRAM for virtual hardware.

AB - DRAM-type multicontext FPGA has potential for virtual hardware, since it is possible to implement a large number of contexts in a single chip. However, only a few examples have been reported because of the difficulty of the mixed process involving DRAM and logic. Here we try to implement a prototype multicontext FPGA with DRAM for virtual hardware.

KW - Computer science

KW - Field programmable gate arrays

KW - Hardware

KW - Multiplexing

KW - Programmable logic arrays

KW - Prototypes

KW - Random access memory

KW - Reconfigurable logic

KW - Table lookup

KW - Virtual prototyping

UR - http://www.scopus.com/inward/record.url?scp=0141980700&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0141980700&partnerID=8YFLogxK

U2 - 10.1109/ASPDAC.2001.913267

DO - 10.1109/ASPDAC.2001.913267

M3 - Conference contribution

AN - SCOPUS:0141980700

T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

SP - 17

EP - 18

BT - Proceedings of the ASP-DAC 2001

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - Asia and South Pacific Design Automation Conference 2001, ASP-DAC 2001

Y2 - 30 January 2001 through 2 February 2001

ER -

A prototype chip of multicontext FPGA with DRAM for virtual hardware

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this