A survey on dynamically reconfigurable processors

Research output: Contribution to journalArticle

52 Citations (Scopus)

Abstract

Dynamically reconfigurable processors are consisting of an array of processing elements whose functions and interconnections can be dynamically changed. 9 commercial systems are picked up, and their array structures, processing elements and interconnection architectures are classified.

Original languageEnglish
Pages (from-to)3179-3187
Number of pages9
JournalIEICE Transactions on Communications
VolumeE89-B
Issue number12
DOIs
Publication statusPublished - 2006 Dec

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Keywords

  • Dynamically reconfigurable processors

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Networks and Communications

Cite this

A survey on dynamically reconfigurable processors. / Amano, Hideharu.

In: IEICE Transactions on Communications, Vol. E89-B, No. 12, 12.2006, p. 3179-3187.

Research output: Contribution to journalArticle

@article{24944b4a471e48d8bbb0e1e101fb7eb4,
title = "A survey on dynamically reconfigurable processors",
abstract = "Dynamically reconfigurable processors are consisting of an array of processing elements whose functions and interconnections can be dynamically changed. 9 commercial systems are picked up, and their array structures, processing elements and interconnection architectures are classified.",
keywords = "Dynamically reconfigurable processors",
author = "Hideharu Amano",
year = "2006",
month = "12",
doi = "10.1093/ietcom/e89-b.12.3179",
language = "English",
volume = "E89-B",
pages = "3179--3187",
journal = "IEICE Transactions on Communications",
issn = "0916-8516",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "12",

}

TY - JOUR

T1 - A survey on dynamically reconfigurable processors

AU - Amano, Hideharu

PY - 2006/12

Y1 - 2006/12

N2 - Dynamically reconfigurable processors are consisting of an array of processing elements whose functions and interconnections can be dynamically changed. 9 commercial systems are picked up, and their array structures, processing elements and interconnection architectures are classified.

AB - Dynamically reconfigurable processors are consisting of an array of processing elements whose functions and interconnections can be dynamically changed. 9 commercial systems are picked up, and their array structures, processing elements and interconnection architectures are classified.

KW - Dynamically reconfigurable processors

UR - http://www.scopus.com/inward/record.url?scp=33845573958&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33845573958&partnerID=8YFLogxK

U2 - 10.1093/ietcom/e89-b.12.3179

DO - 10.1093/ietcom/e89-b.12.3179

M3 - Article

AN - SCOPUS:33845573958

VL - E89-B

SP - 3179

EP - 3187

JO - IEICE Transactions on Communications

JF - IEICE Transactions on Communications

SN - 0916-8516

IS - 12

ER -