Abstract
This new toolchain for accelerating application on CPU-FPGA platforms, called Courier-FPGA, extracts runtime information from a running target binary, and re-constructs the function call graph including input-output data. Then, it synthesizes hardware modules on the FPGA and makes software functions on CPU by using Pipeline Generator. The Pipeline Generator also builds a pipeline control program by using Intel Threading Building Block (Intel TBB) to run both hardware modules and software functions in parallel. Finally, Courier-FPGA’s Function Off-loader dynamically replaces and off-loads the original functions in the binary by using the built pipeline. Courier-FPGA performs the off-loading without user intervention, source code tweaks or re-compilations of the binary. In our case studies, Courier-FPGA was used to accelerate a histogram-of-gradients (HOG) feature detection program on the Zynq platform. A series of functions were off-loaded, and the program was sped up 3.98 times by using the built pipeline.
Original language | English |
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Pages (from-to) | 153-162 |
Number of pages | 10 |
Journal | Journal of information processing |
Volume | 23 |
Issue number | 2 |
DOIs | |
Publication status | Published - 2015 Jan 1 |
Keywords
- Algorithm implementation
- Design methodology
- FPGA
- Heterogeneous platform
ASJC Scopus subject areas
- Computer Science(all)