TY - JOUR
T1 - A toolchain for dynamic function off-load on CPU-FPGA platforms
AU - Miyajima, Takaaki
AU - Thomas, David
AU - Amano, Hideharu
N1 - Publisher Copyright:
© 2015 Information Processing Society of Japan.
PY - 2015
Y1 - 2015
N2 - This new toolchain for accelerating application on CPU-FPGA platforms, called Courier-FPGA, extracts runtime information from a running target binary, and re-constructs the function call graph including input-output data. Then, it synthesizes hardware modules on the FPGA and makes software functions on CPU by using Pipeline Generator. The Pipeline Generator also builds a pipeline control program by using Intel Threading Building Block (Intel TBB) to run both hardware modules and software functions in parallel. Finally, Courier-FPGA’s Function Off-loader dynamically replaces and off-loads the original functions in the binary by using the built pipeline. Courier-FPGA performs the off-loading without user intervention, source code tweaks or re-compilations of the binary. In our case studies, Courier-FPGA was used to accelerate a histogram-of-gradients (HOG) feature detection program on the Zynq platform. A series of functions were off-loaded, and the program was sped up 3.98 times by using the built pipeline.
AB - This new toolchain for accelerating application on CPU-FPGA platforms, called Courier-FPGA, extracts runtime information from a running target binary, and re-constructs the function call graph including input-output data. Then, it synthesizes hardware modules on the FPGA and makes software functions on CPU by using Pipeline Generator. The Pipeline Generator also builds a pipeline control program by using Intel Threading Building Block (Intel TBB) to run both hardware modules and software functions in parallel. Finally, Courier-FPGA’s Function Off-loader dynamically replaces and off-loads the original functions in the binary by using the built pipeline. Courier-FPGA performs the off-loading without user intervention, source code tweaks or re-compilations of the binary. In our case studies, Courier-FPGA was used to accelerate a histogram-of-gradients (HOG) feature detection program on the Zynq platform. A series of functions were off-loaded, and the program was sped up 3.98 times by using the built pipeline.
KW - Algorithm implementation
KW - Design methodology
KW - FPGA
KW - Heterogeneous platform
UR - http://www.scopus.com/inward/record.url?scp=84924814253&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84924814253&partnerID=8YFLogxK
U2 - 10.2197/ipsjjip.23.153
DO - 10.2197/ipsjjip.23.153
M3 - Article
AN - SCOPUS:84924814253
SN - 0387-5806
VL - 23
SP - 153
EP - 162
JO - Journal of Information Processing
JF - Journal of Information Processing
IS - 2
ER -