A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops

Aika Kamei, Hideharu Amano, Takuya Kojima, Daiki Yokoyama, Kimiyoshi Usami, Keizo Hiraga, Kenta Suzuki, Kazuhiro Bessho

Research output: Contribution to journalArticlepeer-review


While the spin-transfer torque (STT) magnetic tunnel junction (MTJ) is a promising technique for enabling nonvolatile flip-flops (NVFFs) to perform power gating to reduce leakage power without any data losses, the large store energy (the energy to make a store operation) of MTJs needs to be addressed. The nonvolatile cool mega array series is an edge-oriented coarse-grained reconfigurable accelerator that implements an improved MTJ-based NVFF with a verify-and-retryable store method that should ideally reduce the store energy under the presence of the switching time variation originating from the stochastic nature of the MTJs. However, the energy reduction effect of the method has not been formulated or evaluated thoroughly enough to make the best use of the method in actual applications. In this study, we propose an analytical model to estimate the store energy in typical operational conditions under the assumption of switching time variations following the normal distributions based on the measurements of a real chip fabricated with a 40-nm perpendicular MTJ/CMOS hybrid process. In contrast to the tedious measurement on each different condition, the proposed model allows for an instantaneous determination of the best storing method for minimizing the store energy, with an energy reduction of up to 69% compared with a conventional one-time attempt storing method. This model is expected to be used for system-level energy simulations and, ultimately, for design explorations in pursuit of energy-optimized memory.

Original languageEnglish
Pages (from-to)532-542
Number of pages11
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number4
Publication statusPublished - 2023 Apr 1


  • Coarse-grained reconfigurable array (CGRA)
  • edge computing
  • energy estimation
  • multiple regression analysis
  • nonvolatile memory
  • spin-transfer torque magnetoresistive random access memory (RAM) (STT-MRAM)

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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