A very-high-speed ATM switch architecture using internal speed-up technique

Kouichi Genda, Yukihiro Doi, Ken Ichi Endo, Naoaki Yamanaka

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

An internal speed-up crossbar-type ATM switch architecture is proposed. This switch accommodates 10 Gbit/s cell streams from AHMs in order to guarantee the QoS of switched cells. A new high-speed arbitration algorithm using three buses on each output line, called the bi-directional arbiter, is used. It handles output contention about twice as fast as the conventional ring-arbiter and has the same fairness function. It increases the switch throughput to 160 Gbit/s efficiently. By combining the high-speed switch and AHMs, it will be able to make a sub-terabit/s ATM switching system for future Broadband ISDN networks.

Original languageEnglish
Pages (from-to)20-27
Number of pages8
JournalNTT Review
Volume9
Issue number2
Publication statusPublished - 1997 Mar 1
Externally publishedYes

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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