Abstract
As a switch architecture of the AMC with switch throughput of 160 Gbit/s, we proposed an internal speed-up crossbar-type ATM switch architecture. This switch accommodates 10-Gbit/s cell streams from AHMs in order to guarantee the QoS of switched cells. A new high-speed arbitration algorithm using three buses on each output line, called the bidirectional arbiter, is used. This handles output contention about twice as fast as the conventional ring-arbiter and has the same fairness function. This increases the switch throughput to 160 Gbit/s efficiently. By combining our high-speed switch and AHMs, we should be able to make a sub-terabit/s ATM switching system for the future Broadband ISDN network.
Original language | English |
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Pages (from-to) | 847-853 |
Number of pages | 7 |
Journal | NTT R and D |
Volume | 45 |
Issue number | 9 |
Publication status | Published - 1996 Dec 1 |
Externally published | Yes |
ASJC Scopus subject areas
- Electrical and Electronic Engineering