A wireless real-time on-chip bus trace system

Shusuke Kawai, Takayuki Ikari, Yutaka Takikawa, Hiroki Ishikuro, Tadahiro Kuroda

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    1 Citation (Scopus)

    Abstract

    A 480Mb/s wireless real-time bus trace system with a pulse-based inductive coupling channel array was developed using a 0.25nm CMOS digital process. The size and pitch of the inductor array are determined by numerical calculation to optimize the tradeoff between the channel coupling, crosstalk, and alignment tolerance. A low-power quasi-synchronous system is proposed to obtain an enough timing margin for RX pulse detection under the presence of the clock skew.

    Original languageEnglish
    Title of host publicationProceedings of the ASP-DAC 2009
    Subtitle of host publicationAsia and South Pacific Design Automation Conference 2009
    Pages91-92
    Number of pages2
    DOIs
    Publication statusPublished - 2009 Apr 20
    EventAsia and South Pacific Design Automation Conference 2009, ASP-DAC 2009 - Yokohama, Japan
    Duration: 2009 Jan 192009 Jan 22

    Publication series

    NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

    Other

    OtherAsia and South Pacific Design Automation Conference 2009, ASP-DAC 2009
    CountryJapan
    CityYokohama
    Period09/1/1909/1/22

    ASJC Scopus subject areas

    • Computer Science Applications
    • Computer Graphics and Computer-Aided Design
    • Electrical and Electronic Engineering

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  • Cite this

    Kawai, S., Ikari, T., Takikawa, Y., Ishikuro, H., & Kuroda, T. (2009). A wireless real-time on-chip bus trace system. In Proceedings of the ASP-DAC 2009: Asia and South Pacific Design Automation Conference 2009 (pp. 91-92). [4796447] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2009.4796447