Advanced ATM-layer function MCM-D module for ATM wide-area network

Tomoaki Kawamura, Naoaki Yamanaka, Katsumi Kaizu

Research output: Contribution to journalConference article

3 Citations (Scopus)

Abstract

This paper describes a high-performance and cost-effective MCM-D module for an ATM-layer function device. The MCM-D module is fabricated on a Si-substrate using the stacking RAM technique to reduce module size. The MCM has a 4-layer Si substrate, a high-performance ASIC, 8 high-speed SRAMs, and an FPGA. By using the stacking RAM technique, MCM-D module size was reduced to 50.8 mm×50.8 mm. This is 40% of that (100 mm×65 mm) of a double-side mounted sub-board module with conventional packaging (QFP and SOP). The MCM-D module realizes the ATM-layer functions that require a high-performance ASIC with high-speed (access time 20 ns) and large-capacity (1 MBytes) SRAM cache. The MCM approach is quite effective in increasing memory access speed because it realizes high-density packaging. The MCM-D module was mounted on an ATM line interface circuit, and realized 150 Mbit/s throughput ATM-layer functions(header conversion and on-line monitoring) in an ATM switching system. In addition, advanced ATM-WAN (wide-area network) switching system hardware technologies with sub-module structure are also described. The MCM-D module is one of the sub-modules of the system. This MCM technology and sub-module technology can be applied to ATM-WAN switching systems and future B-ISDN ATM switching systems.

Original languageEnglish
Pages (from-to)486-490
Number of pages5
JournalProceedings - Electronic Components and Technology Conference
Publication statusPublished - 1997 Jan 1
Externally publishedYes
EventProceedings of the 1997 47th IEEE Electronic Components & Technology Conference - San Jose, CA, USA
Duration: 1997 May 181997 May 21

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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