Advanced ATM switching system line interface hardware technologies based on MCM-D integrated with ASIC and S-RAMS

Naoaki Yamanaka, Tomoaki Kawamura, Katsumi Kaizu

Research output: Contribution to conferencePaper

2 Citations (Scopus)

Abstract

This paper describes newly developed advanced ATM switching system hardware structures. They are based on the Si-Substrate MCM-D technology which integrates ASIC custom VLSIs, high-speed S-RAMs and FPGAs (Field Programmable Gate Arrays). The MCM-D module realizes the ATM layer function by combining a high-performance ASIC with high-speed S-RAM cache. This is made possible by high density packaging and high-speed (20 ns) access to 1-Mbit of memory. The MCM employs 8 S-RAMs, possible with the stacked RAM technique, to reduce module size. This sub-module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems.

Original languageEnglish
Pages286-289
Number of pages4
Publication statusPublished - 1997 Jan 1
Externally publishedYes
EventProceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium - Tokyo, Jpn
Duration: 1997 Apr 161997 Apr 18

Other

OtherProceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium
CityTokyo, Jpn
Period97/4/1697/4/18

ASJC Scopus subject areas

  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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    Yamanaka, N., Kawamura, T., & Kaizu, K. (1997). Advanced ATM switching system line interface hardware technologies based on MCM-D integrated with ASIC and S-RAMS. 286-289. Paper presented at Proceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium, Tokyo, Jpn, .