Abstract
Futurebus is a standard system bus architecture for multiprocessor systems, approved as IEEE standard P.896 in 1987. The protocol set defined in the standard is a complex one because it pursues high performance and technology independence. However, after the approval of the standard, study on Futurebus+ was begun, which aimed at achieving higher transfer performance, robustness, and real-time performances. The evaluation for the Futurebus was left untouched. Therefore, in this article, we evaluate the performance of the bus arbitration protocol of the Futurebus by a theoretical analysis. The bus arbitration protocol is one of the features of the Futurebus asynchronous transfer protocol. As a result of this study, we have found that Futurebus has unfairness in arbitration and the possibility of inducing overhead in a mechanism to avoid a starvation state.
Original language | English |
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Pages (from-to) | 66-77 |
Number of pages | 12 |
Journal | Systems and Computers in Japan |
Volume | 29 |
Issue number | 13 |
DOIs | |
Publication status | Published - 1998 Nov 30 |
Keywords
- Bus arbitration protocol
- System bus
ASJC Scopus subject areas
- Theoretical Computer Science
- Information Systems
- Hardware and Architecture
- Computational Theory and Mathematics