The Full Particle-In-Cell (Full-PIC) method is a numerical simulation technique used in the research and development of Hall-thrusters, a propulsion mechanism of satellites. The Japan Aerospace Exploration Agency (JAXA) has been developing a software package called NSRU-Full-PIC for the design of Hall thrusters. Since the numerical simulation of NSRU-Full-PIC requires a large computing power, energy efficient accelerators are essential. However, because of the frequent random memory access and Read-After-Write (RAW) hazard, acceleration with GPUs is difficult. In this paper, we tackle the problems by cooperating a CPU and an FPGA in an ARM-based heterogeneous FPGA accelerator. We use Intel’s mid-range SoC, Arria 10 which embeds floating point DSPs for high performance yet low power numerical computation. Intel FPGA SDK for OpenCL is available in the platform for easy offloading of complex tasks. Heavy load processes in NSRU-Full-PIC are implemented with a hardware/software co-design on Arria 10 SoC. Our implementation improved the power consumption by 5.66 times compared to the original code on a Xeon E5-2680 v2 2.8 GHz . The total energy consumption was reduced to 88.44% of the Xeon implementation. The target tasks become 3.48 times faster than the original code on an only ARM Cortex-A9 1.5 GHz in Arria 10 SoC, and 2.50 times faster than the implementation using atomic instructions on an NVIDIA K20c GPU.