An efficient path setup for a hybrid photonic Network-on-Chip

Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Electrical Network-on-Chip (NoC) faces critical challenges in meeting the high performance and low power consumption requirements for future multicore processors interconnection. Recent tremendous advances in CMOS compatible optical components give the potential for photonics to deliver an efficient NoC performance at an acceptable energy cost. However, the lack of in flight processing and buffering of optical data made the realization of a fully optical NoC complicated. A hybrid architecture which uses optical high bandwidth transfer and a tiny electrical control network can take advantage of both interconnection methods to offer an efficient performance-per-watt infrastructure to connect multicore processors and System-on-Chip (SoC). In this paper, we propose a hybrid photonic torus NoC (HPNoC) that uses a predictive switching to improve the performance of a hybrid architecture. By using prediction techniques, we can reduce the path set up latency for the electrical control network hence improving the overall end-to-end delay for communication in the HPNoC. Simulation results using a cycle accurate simulator under uniform, neighbor and bitreversal traffic patterns for 64 nodes show that predictive switching considerably improves the HPNoC overall performance.

Original languageEnglish
Title of host publicationProceedings - 2010 1st International Conference on Networking and Computing, ICNC 2010
Pages156-161
Number of pages6
DOIs
Publication statusPublished - 2010 Dec 1
Externally publishedYes
Event1st International Conference on Networking and Computing, ICNC 2010 - Higashi-Hiroshima, Japan
Duration: 2010 Nov 172010 Nov 19

Publication series

NameProceedings - 2010 1st International Conference on Networking and Computing, ICNC 2010

Other

Other1st International Conference on Networking and Computing, ICNC 2010
CountryJapan
CityHigashi-Hiroshima
Period10/11/1710/11/19

Keywords

  • Multicore processors
  • Nanophotonics
  • Photonic NoC
  • Predictive switching

ASJC Scopus subject areas

  • Computer Networks and Communications

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  • Cite this

    Adi, C. A. D., Matsutani, H., Koibuchi, M., Irie, H., Miyoshi, T., & Yoshinaga, T. (2010). An efficient path setup for a hybrid photonic Network-on-Chip. In Proceedings - 2010 1st International Conference on Networking and Computing, ICNC 2010 (pp. 156-161). [5695227] (Proceedings - 2010 1st International Conference on Networking and Computing, ICNC 2010). https://doi.org/10.1109/IC-NC.2010.31