An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking

Tomohiro Totoki, Michihiro Koibuchi, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

HotSpot is an open source analysis tool for estimating temperature of both 2D and 3D chip stacks. It counts both the primary path of the heat transfer through the heat-sink and the secondary path through the print circuit board. It can estimate the temperature of chips. However, HotSpot-6.0 cannot treat a complicated chip stacking such as the castle of chips (CoC) with inductive wireless coupling through-chip interface (TCI). Therefore, in this report we have extended the HotSpot simulator and updated it in order to evaluate CoC. Compared to the original HotSpot, the extended version of HotSpot had an average execution time increase of about 6% when evaluating the same vertical stacking. The execution time of CoC with the same number of chips is shorter than when executing vertical stacking, but when the number of layers is the same, the execution time is almost equal. Moreover, our design considers high productivity, e.g. it can easily set air cooling, oil cooling, water cooling evaluation and chip rotation setting.

Original languageEnglish
Title of host publicationProceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages363-369
Number of pages7
ISBN (Electronic)9781538691847
DOIs
Publication statusPublished - 2018 Dec 26
Event6th International Symposium on Computing and Networking Workshops, CANDARW 2018 - Takayama, Japan
Duration: 2018 Nov 272018 Nov 30

Publication series

NameProceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018

Conference

Conference6th International Symposium on Computing and Networking Workshops, CANDARW 2018
CountryJapan
CityTakayama
Period18/11/2718/11/30

Fingerprint

Stacking
Hot Spot
Chip
Cooling
Heat sinks
Cooling water
Modeling
Simulators
Productivity
Heat transfer
Temperature
Execution Time
Networks (circuits)
Air
Vertical
Path
Open Source
Heat Transfer
Count
Simulator

Keywords

  • 3D stacking
  • HotSpot
  • TCI

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Statistics, Probability and Uncertainty
  • Computer Science Applications

Cite this

Totoki, T., Koibuchi, M., & Amano, H. (2018). An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking. In Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018 (pp. 363-369). [8590927] (Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CANDARW.2018.00073

An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking. / Totoki, Tomohiro; Koibuchi, Michihiro; Amano, Hideharu.

Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 363-369 8590927 (Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Totoki, T, Koibuchi, M & Amano, H 2018, An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking. in Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018., 8590927, Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018, Institute of Electrical and Electronics Engineers Inc., pp. 363-369, 6th International Symposium on Computing and Networking Workshops, CANDARW 2018, Takayama, Japan, 18/11/27. https://doi.org/10.1109/CANDARW.2018.00073
Totoki T, Koibuchi M, Amano H. An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking. In Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 363-369. 8590927. (Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018). https://doi.org/10.1109/CANDARW.2018.00073
Totoki, Tomohiro ; Koibuchi, Michihiro ; Amano, Hideharu. / An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking. Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 363-369 (Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018).
@inproceedings{7adfd6ca7b15492fa0ec8d0695a5952f,
title = "An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking",
abstract = "HotSpot is an open source analysis tool for estimating temperature of both 2D and 3D chip stacks. It counts both the primary path of the heat transfer through the heat-sink and the secondary path through the print circuit board. It can estimate the temperature of chips. However, HotSpot-6.0 cannot treat a complicated chip stacking such as the castle of chips (CoC) with inductive wireless coupling through-chip interface (TCI). Therefore, in this report we have extended the HotSpot simulator and updated it in order to evaluate CoC. Compared to the original HotSpot, the extended version of HotSpot had an average execution time increase of about 6{\%} when evaluating the same vertical stacking. The execution time of CoC with the same number of chips is shorter than when executing vertical stacking, but when the number of layers is the same, the execution time is almost equal. Moreover, our design considers high productivity, e.g. it can easily set air cooling, oil cooling, water cooling evaluation and chip rotation setting.",
keywords = "3D stacking, HotSpot, TCI",
author = "Tomohiro Totoki and Michihiro Koibuchi and Hideharu Amano",
year = "2018",
month = "12",
day = "26",
doi = "10.1109/CANDARW.2018.00073",
language = "English",
series = "Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "363--369",
booktitle = "Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018",

}

TY - GEN

T1 - An extension of a temperature modeling tool hotspot 6.0 for castle-of-chips stacking

AU - Totoki, Tomohiro

AU - Koibuchi, Michihiro

AU - Amano, Hideharu

PY - 2018/12/26

Y1 - 2018/12/26

N2 - HotSpot is an open source analysis tool for estimating temperature of both 2D and 3D chip stacks. It counts both the primary path of the heat transfer through the heat-sink and the secondary path through the print circuit board. It can estimate the temperature of chips. However, HotSpot-6.0 cannot treat a complicated chip stacking such as the castle of chips (CoC) with inductive wireless coupling through-chip interface (TCI). Therefore, in this report we have extended the HotSpot simulator and updated it in order to evaluate CoC. Compared to the original HotSpot, the extended version of HotSpot had an average execution time increase of about 6% when evaluating the same vertical stacking. The execution time of CoC with the same number of chips is shorter than when executing vertical stacking, but when the number of layers is the same, the execution time is almost equal. Moreover, our design considers high productivity, e.g. it can easily set air cooling, oil cooling, water cooling evaluation and chip rotation setting.

AB - HotSpot is an open source analysis tool for estimating temperature of both 2D and 3D chip stacks. It counts both the primary path of the heat transfer through the heat-sink and the secondary path through the print circuit board. It can estimate the temperature of chips. However, HotSpot-6.0 cannot treat a complicated chip stacking such as the castle of chips (CoC) with inductive wireless coupling through-chip interface (TCI). Therefore, in this report we have extended the HotSpot simulator and updated it in order to evaluate CoC. Compared to the original HotSpot, the extended version of HotSpot had an average execution time increase of about 6% when evaluating the same vertical stacking. The execution time of CoC with the same number of chips is shorter than when executing vertical stacking, but when the number of layers is the same, the execution time is almost equal. Moreover, our design considers high productivity, e.g. it can easily set air cooling, oil cooling, water cooling evaluation and chip rotation setting.

KW - 3D stacking

KW - HotSpot

KW - TCI

UR - http://www.scopus.com/inward/record.url?scp=85061456584&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85061456584&partnerID=8YFLogxK

U2 - 10.1109/CANDARW.2018.00073

DO - 10.1109/CANDARW.2018.00073

M3 - Conference contribution

AN - SCOPUS:85061456584

T3 - Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018

SP - 363

EP - 369

BT - Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018

PB - Institute of Electrical and Electronics Engineers Inc.

ER -